RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

LEVANTINO, SALVATORE
 Distribuzione geografica
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Continente #
NA - Nord America 17.209
EU - Europa 10.201
AS - Asia 8.773
SA - Sud America 1.236
AF - Africa 386
OC - Oceania 18
Continente sconosciuto - Info sul continente non disponibili 8
Totale 37.831
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Nazione #
US - Stati Uniti d'America 16.807
RU - Federazione Russa 3.528
IT - Italia 3.100
SG - Singapore 2.745
CN - Cina 2.101
VN - Vietnam 1.131
BR - Brasile 1.034
HK - Hong Kong 629
KR - Corea 582
JP - Giappone 538
DE - Germania 478
AT - Austria 477
FR - Francia 391
NL - Olanda 344
GB - Regno Unito 333
UA - Ucraina 303
IN - India 268
FI - Finlandia 267
CA - Canada 264
IE - Irlanda 246
SE - Svezia 242
MA - Marocco 160
TW - Taiwan 158
ES - Italia 122
BD - Bangladesh 102
JO - Giordania 91
PL - Polonia 90
AR - Argentina 80
MX - Messico 74
BE - Belgio 55
ZA - Sudafrica 51
IQ - Iraq 49
TR - Turchia 48
EG - Egitto 46
ID - Indonesia 46
CI - Costa d'Avorio 36
PH - Filippine 34
CH - Svizzera 33
PK - Pakistan 32
EC - Ecuador 29
GR - Grecia 28
UZ - Uzbekistan 22
AE - Emirati Arabi Uniti 21
CO - Colombia 21
VE - Venezuela 21
NO - Norvegia 20
AL - Albania 19
IL - Israele 19
SA - Arabia Saudita 18
KE - Kenya 17
BJ - Benin 16
IR - Iran 16
DK - Danimarca 15
BG - Bulgaria 14
CL - Cile 14
CR - Costa Rica 14
CZ - Repubblica Ceca 14
MO - Macao, regione amministrativa speciale della Cina 14
TH - Thailandia 14
KZ - Kazakistan 13
AZ - Azerbaigian 12
PE - Perù 12
PT - Portogallo 12
AU - Australia 11
PY - Paraguay 11
ET - Etiopia 9
JM - Giamaica 9
KG - Kirghizistan 9
RO - Romania 9
EE - Estonia 8
LT - Lituania 8
TN - Tunisia 8
BO - Bolivia 7
DZ - Algeria 7
EU - Europa 7
HU - Ungheria 7
LK - Sri Lanka 7
NP - Nepal 7
TT - Trinidad e Tobago 7
LA - Repubblica Popolare Democratica del Laos 6
LB - Libano 6
PA - Panama 6
GE - Georgia 5
HN - Honduras 5
HR - Croazia 5
MU - Mauritius 5
NG - Nigeria 5
OM - Oman 5
RS - Serbia 5
SK - Slovacchia (Repubblica Slovacca) 5
UY - Uruguay 5
BB - Barbados 4
DO - Repubblica Dominicana 4
KW - Kuwait 4
NZ - Nuova Zelanda 4
PS - Palestinian Territory 4
SI - Slovenia 4
SN - Senegal 4
SV - El Salvador 4
AO - Angola 3
Totale 37.759
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Città #
Ashburn 2.619
Singapore 1.557
San Jose 1.494
Fairfield 1.389
Milan 1.104
Chandler 981
Woodbridge 789
Santa Clara 651
Houston 628
Wilmington 599
Seattle 574
Hong Kong 532
Moscow 499
Cambridge 494
Seoul 483
Hefei 448
Vienna 439
Tokyo 432
Los Angeles 386
Ann Arbor 384
Beijing 356
Council Bluffs 325
The Dalles 321
Boardman 255
Dong Ket 234
Ho Chi Minh City 224
Dublin 219
Lauterbourg 189
Jacksonville 188
Kent 183
Dallas 182
Hanoi 177
Dearborn 170
New York 161
North Charleston 157
Rome 150
Medford 149
Lawrence 146
Turin 127
Amsterdam 117
Frankfurt am Main 108
Shanghai 104
San Diego 103
Helsinki 101
Buffalo 99
São Paulo 95
Ottawa 94
Casablanca 91
Taipei 91
Amman 90
London 78
Orem 70
Redwood City 68
Málaga 66
Chicago 64
Las Vegas 59
Des Moines 56
Kenitra 56
Warsaw 56
Montreal 46
Munich 46
Guangzhou 42
Stockholm 42
Denver 40
Chennai 39
Toronto 39
Brescia 38
Naples 38
Da Nang 37
Brussels 36
Turku 36
Washington 35
Abidjan 34
Brooklyn 34
Phoenix 34
Redmond 34
Verona 34
Mumbai 33
Sesto San Giovanni 33
Columbus 32
Atlanta 31
Haiphong 31
Salt Lake City 31
Cairo 30
Duncan 30
Bologna 29
Rio de Janeiro 28
Legnano 27
Changsha 25
Frisco 25
Johannesburg 25
Redondo Beach 24
Belo Horizonte 23
Meguro City 23
Mexico City 23
Poplar 23
Tianjin 23
Florence 22
Hangzhou 21
Lappeenranta 21
Totale 23.358
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Nome #
A 23-GHz Low-Phase-Noise Digital Bang-Bang PLL for Fast Triangular and Sawtooth Chirp Modulation 372
AM-to-PM conversion in varactor-tuned oscillators 309
A 68.6fs_rms-Total-integrated-Jitter and 1.5us-Locking-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching 306
A 900-MS/s SAR-based Time-Interleaved ADC with a Fully Programmable Interleaving Factor and On-Chip Scalable Background Calibrations 297
A 1.7 GHz Fractional-N Frequency Synthesizer Based on a Multiplying Delay-Locked Loop 294
A Low-Spur and Low-Jitter Fractional-N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering 274
A 1.7GHz MDLL-based fractional-N frequency synthesizer with 1.4ps RMS integrated jitter and 3mW power using a 1b TDC 273
Power-jitter trade-off analysis in digital-to-time converters 272
Design issues and performance analysis of CCM boost converters with RHP zero mitigation via inductor current sensing 272
A 1.6-to-3.0-GHz Fractional-N MDLL With a Digital-to-Time Converter Range-Reduction Technique Achieving 397-fs Jitter at 2.5-mW Power 269
A 2.9–4.0-GHz Fractional-N Digital PLL With Bang-Bang Phase Detector and 560-fsrms Integrated Jitter at 4.5-mW Power 267
A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping 265
A 30-GHz Digital Sub-Sampling Fractional-N PLL With -238.6-dB Jitter-Power Figure of Merit in 65-nm LP CMOS 261
A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter 256
16.7 A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fs rms Jitter in 65nm LP CMOS 251
A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter 248
A 23GHz low-phase-noise digital bang-bang PLL for fast triangular and saw-tooth chirp modulation 247
Analysis and Design of Low-Jitter Digital Bang-Bang Phase-Locked Loops 243
A 1.6-to-3.0-GHz Fractional-N MDLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 397fs Jitter at 2.5-mW Power 242
4.3 A 76.7fs-lntegrated-Jitter and −71.9dBc In-Band Fractional-Spur Bang-Bang Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering 241
A 10.2-ENOB, 150-MS/s redundant SAR ADC with a quasi-monotonic switching algorithm for time-interleaved converters 240
A High Power Density Quasi-Resonant Switched-Capacitor DC-DC Converter with Single Semi-Period Tank Current Modulation 236
A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang-Bang PLL With Digital Frequency-Error Recovery for Fast Locking 235
Chirp Generators for Millimeter-Wave FMCW Radars 227
A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking-Time 226
A 59.3fs Jitter and -62.1dBc Fractional-Spur Digital PLL Based on a Multi-Edge Power-Gating Phase-Detector 224
A 2-GS/s Time-Interleaved ADC With Embedded Background Calibrations and a Novel Reference Buffer for Reduced Inter-Channel Crosstalk 224
4.5 A 9.25GHz Digital PLL with Fractional-Spur Cancellation Based on a Multi-DTC Topology 223
32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays 223
A Background Calibration Technique to Control the Bandwidth of Digital PLLs 221
A 2.9-to-4.0GHz fractional-N digital PLL with Bang-Bang phase detector and 560fsrms integrated jitter at 4.5mw power 221
Hybrid Resonant Switched-Capacitor Converter for 48-3.4 V Direct Conversion 220
34.3 A 4.75GHz Digital PLL with 45.8fs Integrated-Jitter and 257dB FoM Based on a Voltage-Biased Harmonic-Shaping DCO with Adaptive Common-Mode Resonance Tuning 216
An Adaptive Pre-Distortion Technique to Mitigate the DTC Nonlinearity in Digital PLLs 215
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner 214
Efficient Behavioral Simulation of Charge-Pump Phase-Locked Loops 212
Bang-bang digital PLLs for wireless systems 212
A 1-A 90% Peak Efficiency 5–36-V Input Voltage Time-Based Buck Converter with Adaptive Gain Compensation and Controlled-Skip Operation 210
Wideband chirp generation techniques in digital phase-locked loops 209
A Wideband Fractional-N PLL With Suppressed Charge-Pump Noise and Automatic Loop Filter Calibration 209
A 10-GHz Digital-PLL-Based Chirp Generator With Parabolic Non-Uniform Digital Predistortion for FMCW Radars 207
A Novel Single-Inductor Injection-Locked Frequency Divider by Three With Dual-Injection Secondary Locking 207
A 2-V 2.5-GHz – 104-dBc/Hz at 100kHz Fully Integrated VCO with Wide-Band Low-Noise Automatic Amplitude Control Loop 206
A low-phase-noise digital bang-bang PLL with fast lock over a wide lock range 206
A 15.6-18.2 GHz digital bang-bang PLL with -63dBc in-band fractional spur 206
Concurrent effect of redundancy and switching algorithms in SAR ADCs 205
A 79.3fsrms Jitter Fractional-N Digital PLL Based on a DTC Chopping Technique 204
A Varactor Configuration Minimizing Flicker Noise Up-conversion in VCOs 204
A 12.5GHz Fractional-N Type-I Sampling PLL Achieving 58fs Integrated Jitter 204
A 380μW and -242.8dB FoM Digital-PLL-Based GFSK Modulator with Sub-20μs Settling Frequency Hopping for Bluetooth Low-Energy in 22nm CMOS 202
13.5-mW, 5-GHz WLAN, CMOS frequency synthesizer using a true single phase clock divider 201
A 2-GHz Differentially-Tuned VCO with Reduced Flicker Noise Up-Conversion 201
A 250Mb/s Direct Phase Modulator with -42.4dB EVM Based on a 14GHz Digital PLL 201
10.1 An 8.75GHz Fractional-N Digital PLL with a Reverse-Concavity Variable-Slope DTC Achieving 57.3fsrms Integrated Jitter and −252.4dB FoM 198
Fast-switching analog PLL with finite-impulse response 197
5-GHz Oscillator Array with Reduced Flicker Up-Conversion in 0.13-um CMOS 197
A Wideband Fractional-N PLL with Suppressed Charge-Pump Noise and Automatic Loop Filter Calibration 196
An All-Digital Architecture for Low-Jitter Regulated Delay Lines 195
A Low-Noise Fractional-$N$ Digital PLL Using a Resistor-Based Inverse-Constant-Slope DTC 194
Electronic device for generating a fractional frequency 194
A Novel Start-Up Technique for Time-Based Boost Converters with Seamless PFM/PWM Transition 194
Automatic Amplitude Control Loop for a 2-V, 2.5-GHz LC-tank VCO 193
Efficient Calculation of the Impulse Sensitivity Function in Oscillators 193
A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS 192
An efficient linear-time variant simulation technique of oscillator phase sensitivity function 192
A simulation technique to compute phase noise induced from cyclostationary noise sources in RF oscillators 192
A Novel Common-Gate Comparator with Auto-Zeroing Offset Cancellation 191
A 66.7fs-Integrated-Jitter Fractional-N Digital PLL Based on a Resistive-Inverse-Constant-Slope DTC 191
Analysis and Minimization of Flicker Noise Up-Conversion in Voltage-Biased Oscillators 191
Adaptive Digital Pre-Emphasis for PLL-Based FMCW Modulators 191
A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking 190
Noise Analysis and Minimization in Bang-Bang Digital PLLs 189
Time-to-Digital Converter for Frequency Synthesis based on a Digital Bang-Bang DLL 188
A 13.5-mW 5-GHz Frequency Synthesizer with Dynamic Logic Frequency Divider 187
A Glitch-Corrector Circuit for Low-Spur ADPLLs 187
A multi-tank LC-oscillator 187
A time-digital converter and an electronic system implementing the converter 185
An efficient method to compute phase-noise in injection-locked frequency dividers 185
20Mb/s Phase Modulator Based on a 3.6GHz Digital PLL with -36dB EVM at 5mW Power 185
A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler 184
Spread-Spectrum Frequency Modulation in a DC/DC Converter With Time-Based Control 183
Convertitore tempo-digitale e sistema elettronico impiegante il convertitore 183
A spur cancellation technique for MDLL-based frequency synthesizers 183
RADAR SIGNAL MODULATOR WITH BANDWIDTH COMPENSATION AND FREQUENCY OFFSET SEQUENCE 181
A Novel Feedforward Technique for Improved Line Transient in Time-Based-Controlled Boost Converters 180
Minimum-jitter design of bang-bang PLLs in the presence of 1/f2 and 1/f3 DCO noise 180
Calibration Techniques in Phased-Locked Loops: Theoretical basis and practical applications 178
A wideband voltage-biased LC oscillator with reduced flicker noise up-conversion 178
A -94 dBc/Hz@100 kHz, fully-integrated, 5-GHz, CMOS VCO with 18% tuning range for Bluetooth applications 178
Time-to-digital converter with 3-ps resolution and digital linearization algorithm 177
A Novel LO Phase-Shifting System Based on Digital Bang-Bang PLLs With Background Phase-Offset Correction for Integrated Phased Arrays 176
Integrated Frequency Synthesizers for Wireless Systems 175
Low-power CMOS IEEE 802.11a/g Signal Separator for Outphasing Transmitter 175
A varactor configuration minimizing the amplitude-to-phase noise conversion in VCOs 175
AD-PLL for WiMAX with Digitally-Regulated TDC and Glitch Correction Logic 175
Analysis of adaptive pre-distortion in DTC-based digital fractional-N PLLs 175
A Novel Topology of Coupled Phase-Locked Loops 175
10.6 A 10GHz FMCW Modulator Achieving 680MHz/μs Chirp Slope and 150kHz rms Frequency Error Based on a Digital-PLL with a Non-Uniform Piecewise-Parabolic Digital Predistortion 174
Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase Noise 174
Time-Variant Modeling and Analysis of Multiplying Delay-Locked Loops 173
Totale 21.236
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Categoria #
all - tutte 108.682
article - articoli 45.238
book - libri 516
conference - conferenze 52.331
curatela - curatele 0
other - altro 0
patent - brevetti 7.271
selected - selezionate 0
volume - volumi 3.326
Totale 217.364
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20221.722 74 194 152 97 132 100 97 122 135 108 265 246
2022/20232.578 234 219 92 298 299 276 38 181 438 215 201 87
2023/20241.423 88 224 105 104 156 131 116 93 26 123 49 208
2024/20255.126 60 175 211 100 803 349 296 424 778 288 796 846
2025/202618.890 3.133 2.912 877 1.474 1.180 928 3.155 865 1.131 1.432 696 1.107
2026/2027270 270 0 0 0 0 0 0 0 0 0 0 0
Totale 38.209