This work presents a technique to reduce the phase errors of quadrature signals. The proposed concept is demonstrated on a 2.4-GHz single-sideband up-converter in a 0.35-μm BiCMOS process. The quadrature LO signals are obtained on-chip by means of two coupled oscillators, achieving a figure-of-merit of 186 dB. The image-rejection ratio improves by 7 to 11dB across the 28% LO tuning range with respect to a conventional design. The whole circuit dissipates 47 mW.

A Circuit Technique Improving the Image Rejection of RF Front-Ends

LEVANTINO, SALVATORE;SAMORI, CARLO;LACAITA, ANDREA LEONARDO
2004-01-01

Abstract

This work presents a technique to reduce the phase errors of quadrature signals. The proposed concept is demonstrated on a 2.4-GHz single-sideband up-converter in a 0.35-μm BiCMOS process. The quadrature LO signals are obtained on-chip by means of two coupled oscillators, achieving a figure-of-merit of 186 dB. The image-rejection ratio improves by 7 to 11dB across the 28% LO tuning range with respect to a conventional design. The whole circuit dissipates 47 mW.
2004
Digest of Technical Papers of 2004 Symposium on VLSI Circuits.
0780382870
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/248196
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