This paper presents a novel time-variant model of multiplying delay-locked loops. A simple feed-forward model of the multiplexed ring oscillator mathematically describes the edge realignment process and, by providing an explicit tuning input, allows to be embedded into the time-variant multiplying delay- locked loop model without requiring approximations. Verification of the multiplexed ring oscillator model against detailed circuit simulations is presented. Closed-form expressions for the multi- plying delay-locked loop phase noise, as a function of the system parameters and noise sources, are provided.

Time-Variant Modeling and Analysis of Multiplying Delay-Locked Loops

Santiccioli, Alessio;Samori, Carlo;Lacaita, Andrea L.;Levantino, Salvatore
2019-01-01

Abstract

This paper presents a novel time-variant model of multiplying delay-locked loops. A simple feed-forward model of the multiplexed ring oscillator mathematically describes the edge realignment process and, by providing an explicit tuning input, allows to be embedded into the time-variant multiplying delay- locked loop model without requiring approximations. Verification of the multiplexed ring oscillator model against detailed circuit simulations is presented. Closed-form expressions for the multi- plying delay-locked loop phase noise, as a function of the system parameters and noise sources, are provided.
2019
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CMOS
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1104801
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