RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

BERTULESSI, LUCA
 Distribuzione geografica
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Continente #
NA - Nord America 1.416
EU - Europa 1.054
AS - Asia 278
AF - Africa 13
SA - Sud America 6
Continente sconosciuto - Info sul continente non disponibili 3
OC - Oceania 1
Totale 2.771
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Nazione #
US - Stati Uniti d'America 1.396
IT - Italia 627
AT - Austria 102
SG - Singapore 85
IE - Irlanda 52
VN - Vietnam 51
CN - Cina 48
ES - Italia 48
DE - Germania 37
FI - Finlandia 33
NL - Olanda 32
GB - Regno Unito 30
FR - Francia 21
IN - India 21
CA - Canada 20
JP - Giappone 20
SE - Svezia 19
BE - Belgio 16
HK - Hong Kong 15
JO - Giordania 15
TW - Taiwan 12
UA - Ucraina 10
BJ - Benin 6
RU - Federazione Russa 6
CI - Costa d'Avorio 5
GR - Grecia 4
KR - Corea 4
RO - Romania 4
BR - Brasile 3
CH - Svizzera 3
EU - Europa 3
EE - Estonia 2
IL - Israele 2
NO - Norvegia 2
AL - Albania 1
AR - Argentina 1
AU - Australia 1
AZ - Azerbaigian 1
BG - Bulgaria 1
CL - Cile 1
DK - Danimarca 1
EG - Egitto 1
IR - Iran 1
MK - Macedonia 1
PE - Perù 1
PH - Filippine 1
PL - Polonia 1
SA - Arabia Saudita 1
SC - Seychelles 1
SK - Slovacchia (Repubblica Slovacca) 1
TR - Turchia 1
Totale 2.771
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Città #
Milan 251
Chandler 248
Fairfield 140
Ashburn 104
Vienna 93
Seattle 76
Woodbridge 76
Houston 68
Singapore 63
Wilmington 63
Cambridge 52
Málaga 47
Ann Arbor 44
Boardman 40
Dublin 40
Santa Clara 40
Redmond 30
Lawrence 24
Legnano 24
Castilenti 22
Palazzolo sull'Oglio 22
Amsterdam 21
Turin 21
Dong Ket 20
Helsinki 20
Medford 20
San Diego 20
Brescia 18
New York 18
Amman 15
Ottawa 14
London 12
Redwood City 12
Shanghai 12
Brussels 11
Tokyo 11
Beijing 9
Dearborn 9
Frankfurt am Main 9
Lappeenranta 9
Pasadena 9
Monza 8
Rome 8
Columbus 7
Cotonou 6
Hanoi 6
Irvine 6
Washington 6
Abidjan 5
Bengaluru 5
Central District 5
Edinburgh 5
Genoa 5
Gessate 5
Goodyear 5
Grafing 5
Lecco 5
Naples 5
Princeton 5
San Jose 5
Vimodrone 5
Bari 4
Boydton 4
Chicago 4
Cortenuova 4
Duncan 4
Fara Gera D'adda 4
New Taipei 4
Norwood 4
Padova 4
San Mateo 4
Stockholm 4
Taipei 4
Athens 3
Barge 3
Berlin 3
Carugate 3
Dallas 3
Eindhoven 3
Fremont 3
Graz 3
Los Angeles 3
Meda 3
Mountain View 3
Neubiberg 3
Norwalk 3
San Giuliano Milanese 3
St Louis 3
Toronto 3
Vedano al Lambro 3
Acton 2
Bagnolo Mella 2
Basiliano 2
Bollengo 2
Central 2
Chengdu 2
Chiavari 2
Constanta 2
Cork 2
Cuveglio 2
Totale 2.088
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Nome #
A 23-GHz Low-Phase-Noise Digital Bang-Bang PLL for Fast Triangular and Sawtooth Chirp Modulation 211
A 68.6fs_rms-Total-integrated-Jitter and 1.5us-Locking-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching 165
A 30-GHz Digital Sub-Sampling Fractional-N PLL With -238.6-dB Jitter-Power Figure of Merit in 65-nm LP CMOS 158
A 23GHz low-phase-noise digital bang-bang PLL for fast triangular and saw-tooth chirp modulation 127
16.7 A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fs rms Jitter in 65nm LP CMOS 121
A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter 118
A Background Calibration Technique to Control the Bandwidth of Digital PLLs 116
A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang-Bang PLL With Digital Frequency-Error Recovery for Fast Locking 99
A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping 96
A low-phase-noise digital bang-bang PLL with fast lock over a wide lock range 95
Analysis of power efficiency in high-performance class-B oscillators 95
32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays 94
A 250Mb/s Direct Phase Modulator with -42.4dB EVM Based on a 14GHz Digital PLL 86
A 12.5GHz Fractional-N Type-I Sampling PLL Achieving 58fs Integrated Jitter 84
A 900-MS/s SAR-based Time-Interleaved ADC with a Fully Programmable Interleaving Factor and On-Chip Scalable Background Calibrations 83
A 10.2-ENOB, 150-MS/s redundant SAR ADC with a quasi-monotonic switching algorithm for time-interleaved converters 83
A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter 79
A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking 75
Self-Biasing Dynamic Start-up Circuit for Current-Biased Class-C Oscillators 71
4.3 A 76.7fs-lntegrated-Jitter and −71.9dBc In-Band Fractional-Spur Bang-Bang Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering 59
A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking-Time 54
A 250-MS/s 9.9-ENOB 80.7dB-SFDR Top-Plate Input SAR ADC with Charge Linearization 54
Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase Noise 51
Skew and Jitter Performance in CMOS Clock Phase Splitter Circuits 49
A 3.7-to-4.1GHz Narrowband Digital Bang-Bang PLL with a Multitaps LMS Algorithm to Automatically Control the Bandwidth Achieving 183fs Integrated Jitter 47
A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler 45
A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS 43
4.5 A 9.25GHz Digital PLL with Fractional-Spur Cancellation Based on a Multi-DTC Topology 43
A low-noise high-speed comparator for a 12-bit 200-MSps SAR ADC in a 28-nm CMOS process 43
Concurrent effect of redundancy and switching algorithms in SAR ADCs 42
Frequency Synthesizers Based on Fast-Locking Bang-Bang PLL for Cellular Applications 37
A Timing Skew Correction Technique in Time-Interleaved ADCs Based on a DeltaSigma Digital-to-Time Converter 36
Digital PLLs: The modern timing reference for radar and communication systems 34
A Digital PLL with Multi-tap LMS-based Bandwidth Control 33
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner 31
Circuito integrato per l'estrazione di caratteristiche di segnale 31
A 2-GS/s Time-Interleaved ADC With Embedded Background Calibrations and a Novel Reference Buffer for Reduced Inter-Channel Crosstalk 23
A Novel LO Phase-Shifting System Based on Digital Bang-Bang PLLs With Background Phase-Offset Correction for Integrated Phased Arrays 20
A Novel Push-Pull Input Buffer for Wideband ADCs with Improved High-Frequency Linearity 15
Hardware Accelerator for Feature Extraction from sensors’ physical signals 9
Totale 2.855
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Categoria #
all - tutte 12.048
article - articoli 5.237
book - libri 0
conference - conferenze 6.319
curatela - curatele 0
other - altro 0
patent - brevetti 189
selected - selezionate 0
volume - volumi 303
Totale 24.096
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/2020189 0 0 0 0 38 25 21 21 20 15 24 25
2020/2021413 50 46 64 26 27 8 9 12 36 51 16 68
2021/2022468 12 20 43 59 27 10 28 30 71 16 110 42
2022/2023861 62 69 34 110 82 83 24 38 159 106 68 26
2023/2024428 27 59 43 25 32 45 38 26 38 27 22 46
2024/2025280 10 65 86 24 95 0 0 0 0 0 0 0
Totale 2.855