A Multi-Input Error-Feedback Architecture for Noise-Shaping SAR ADCs

The invention consists of a new architecture for error-feedback (EF) noise-shaping (NS) successive approximation register (SAR) analog-to-digital converters (ADCs) (Fig. 1). The fundamental components of the new implementation are a multi-input comparator (MIC) and a multi-input amplifier (MIA). In the new architecture, the position of the poles and zeros of the noise transfer function (NTF) is well controlled by component ratios within the MIC and the MIA. Figure 1. Circuit implementation of the 1st-order multi-input (MI) EF invention. Compared to currently available solutions, the present invention significantly reduces the noise of the switched-capacitor circuit following the amplifier, resulting in reduced area and power consumption of the amplifier.