Automatic bandwidth control based on least-mean-square adaptive filters has been demonstrated to desensitize the loop gain of a phase-locked loop from process spreads, environmental variations and channel frequency. This work extends this concept to low-jitter designs that adopts aggressive out-of-band filtering, by introducing multi-tap adaptive filtering. The method requires no injection of a training sequence, potentially degrading phase noise, and it is particularly suitable for bang-bang PLLs whose loop bandwidth depends on input noise. A 3.7-to-4.1-GHz PLL prototype embedding a 16-tap adaptive filter for loop gain estimation demonstrates 150-kHz loop bandwidth over input noise and voltage supply variations, at 183-fs RMS integrated jitter and 5.3-mW power consumption.

A Digital PLL with Multi-tap LMS-based Bandwidth Control

Bertulessi, Luca;Samori, Carlo;Levantino, Salvatore
2022-01-01

Abstract

Automatic bandwidth control based on least-mean-square adaptive filters has been demonstrated to desensitize the loop gain of a phase-locked loop from process spreads, environmental variations and channel frequency. This work extends this concept to low-jitter designs that adopts aggressive out-of-band filtering, by introducing multi-tap adaptive filtering. The method requires no injection of a training sequence, potentially degrading phase noise, and it is particularly suitable for bang-bang PLLs whose loop bandwidth depends on input noise. A 3.7-to-4.1-GHz PLL prototype embedding a 16-tap adaptive filter for loop gain estimation demonstrates 150-kHz loop bandwidth over input noise and voltage supply variations, at 183-fs RMS integrated jitter and 5.3-mW power consumption.
2022
CMOS
PLL
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1214729
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