This work presents a very compact self-biasing dynamic startup circuit for class-C voltage-controlled oscillators (VCOs). Using a referenceless nonlinear inverting stage, the solution has been implemented in a 28-nm CMOS technology 14-GHz oscillator, leading to a VCO startup time better than 20 ns, at par with the fastest startup circuits in literature, with an extremely compact area of 0.003 mm2.
Self-Biasing Dynamic Start-up Circuit for Current-Biased Class-C Oscillators
Parisi, A.;Tesolin, F.;Mercandelli, M.;Bertulessi, L.;Lacaita, A. L.
2021-01-01
Abstract
This work presents a very compact self-biasing dynamic startup circuit for class-C voltage-controlled oscillators (VCOs). Using a referenceless nonlinear inverting stage, the solution has been implemented in a 28-nm CMOS technology 14-GHz oscillator, leading to a VCO startup time better than 20 ns, at par with the fastest startup circuits in literature, with an extremely compact area of 0.003 mm2.File in questo prodotto:
File | Dimensione | Formato | |
---|---|---|---|
Self-Biasing_Dynamic_Startup_Circuit_for_Current-Biased_Class-C_Oscillators.pdf
Accesso riservato
:
Publisher’s version
Dimensione
1.41 MB
Formato
Adobe PDF
|
1.41 MB | Adobe PDF | Visualizza/Apri |
FINAL_VERSION.pdf
accesso aperto
:
Post-Print (DRAFT o Author’s Accepted Manuscript-AAM)
Dimensione
1.53 MB
Formato
Adobe PDF
|
1.53 MB | Adobe PDF | Visualizza/Apri |
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.