LACAITA, ANDREA LEONARDO

LACAITA, ANDREA LEONARDO  

DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA  

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Risultati 1 - 20 di 224 (tempo di esecuzione: 0.029 secondi).
Titolo Data di pubblicazione Autori File
A 1.6-to-3.0-GHz Fractional-N MDLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 397fs Jitter at 2.5-mW Power 1-gen-2019 Santiccioli A.Mercandelli M.Lacaita A. L.Samori C.Levantino S.
A 1.7GHz MDLL-based fractional-N frequency synthesizer with 1.4ps RMS integrated jitter and 3mW power using a 1b TDC 1-gen-2014 MARUCCI, GIOVANNIFENAROLI, ANDREALEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO +
A 11-15 GHz CMOS /2 Frequency Divider For Broad-Band I/Q Generation 1-gen-2005 Bonfanti, Andrea GiovanniPanseri, LuigiTedesco, AnnamariaLacaita, Andrea Leonardo
A 11-15 GHz CMOS ÷2 Frequency Divider For Broad-Band I/Q Generation 1-gen-2005 BONFANTI, ANDREA GIOVANNILACAITA, ANDREA LEONARDO +
A 12.5GHz Fractional-N Type-I Sampling PLL Achieving 58fs Integrated Jitter 1-gen-2020 Mercandelli M.Santiccioli A.Parisi A.Bertulessi L.Lacaita A. L.Samori C.Levantino S. +
A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter 1-gen-2021 Mercandelli M.Santiccioli A.Dartizio S. M.Shehata A.Tesolin F.Karman S.Bertulessi L.Buccoleri F.Parisi A.Lacaita A. L.Samori C.Levantino S. +
13.5-mW, 5-GHz WLAN, CMOS frequency synthesizer using a true single phase clock divider 1-gen-2003 SAMORI, CARLOLEVANTINO, SALVATORELACAITA, ANDREA LEONARDO +
A 13.6-69.1GHz 5.6mW Ring-Type Injection-Locked Frequency Divider by Five with >20% Continuous Locking Range and Operation up to 101.6GHz in 28nm CMOS 1-gen-2021 Andrea Leonardo LacaitaSalvatore Levantino +
16.7 A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fs rms Jitter in 65nm LP CMOS 1-gen-2019 Grimaldi, LuigiBertulessi, LucaKarman, SalehSamori, CarloLacaita, Andrea L.Levantino, Salvatore +
A 160 ua, 8 mdps/rt-Hz frequency-modulated MEMS yaw gyroscope 1-gen-2017 MINOTTI, PAOLOMUSSI, GIORGIODELLEA, STEFANOBONFANTI, ANDREA GIOVANNILACAITA, ANDREA LEONARDOLANGFELDER, GIACOMOZEGA, VALENTINACOMI, CLAUDIAFACCHINETTI, STEFANOTOCCHIO, ALESSANDRO
A 2-GHz Low-Power Low-Noise CMOS 32/33 Prescaler 1-gen-2003 LEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO +
20 picosecond resolution single-photon solid-state detector 1-gen-1989 GHIONI, MASSIMO ANTONIOLACAITA, ANDREA LEONARDOCOVA, SERGIORIPAMONTI, GIANCARLO
20Mb/s Phase Modulator Based on a 3.6GHz Digital PLL with -36dB EVM at 5mW Power 1-gen-2012 MARZIN, GIOVANNILEVANTINO, SALVATORESAMORI, CARLOLACAITA, ANDREA LEONARDO
2D QM simulation and optimization of decanano non-overlapped MOS devices 1-gen-2003 GUSMEROLI, RICCARDOSOTTOCORNOLA SPINELLI, ALESSANDROPIROVANO, AGOSTINOLACAITA, ANDREA LEONARDO +
32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays 1-gen-2021 Santiccioli A.Mercandelli M.Dartizio S. M.Tesolin F.Shehata A.Bertulessi L.Buccoleri F.Parisi A.Lacaita A. L.Samori C.Levantino S. +
3D Monte Carlo simulation of the programming dynamics and their statistical variability in nanoscale charge-trap memories 1-gen-2010 AMOROSO, SALVATORE MARIAMACONI, ALESSANDROMONZIO COMPAGNONI, CHRISTIANSOTTOCORNOLA SPINELLI, ALESSANDROLACAITA, ANDREA LEONARDO +
A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking 1-gen-2020 Santiccioli A.Mercandelli M.Bertulessi L.Parisi A.Lacaita A. L.Samori C.Levantino S. +
A 68.6fs_rms-Total-integrated-Jitter and 1.5us-Locking-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching 1-gen-2022 Dartizio S. M.Buccoleri F.Tesolin F.Bertulessi L.Bevilacqua A.Samori C.Lacaita A. L.Levantino S. +
A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler 1-gen-2022 Buccoleri F.Dartizio S. M.Tesolin F.Santiccioli A.Bevilacqua A.Bertulessi L.Cherniak D.Samori C.Lacaita A. L.Levantino S. +
A 2-GHz Differentially-Tuned VCO with Reduced Flicker Noise Up-Conversion 1-gen-2003 LEVANTINO, SALVATOREBONFANTI, ANDREA GIOVANNIROMANO', LUCASAMORI, CARLOLACAITA, ANDREA LEONARDO