PARISI, ANGELO
PARISI, ANGELO
DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA
32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays
2021-01-01 Santiccioli, A.; Mercandelli, M.; Dartizio, S. M.; Tesolin, F.; Karman, S.; Shehata, A.; Bertulessi, L.; Buccoleri, F.; Avallone, L.; Parisi, A.; Cherniak, D.; Lacaita, A. L.; Kennedy, M. P.; Samori, C.; Levantino, S.
A 10.2-ENOB, 150-MS/s redundant SAR ADC with a quasi-monotonic switching algorithm for time-interleaved converters
2022-01-01 Scaletti, Lorenzo; Be', Gabriele; Parisi, Angelo; Bertulessi, Luca; Ricci, Luca; Mercandelli, Mario; Levantino, Salvatore; Samori, Carlo; Bonfanti, ANDREA GIOVANNI
A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter
2022-01-01 Mercandelli, Mario; Santiccioli, Alessio; Parisi, Angelo; Bertulessi, Luca; Cherniak, Dmytro; Lacaita, Andrea L.; Samori, Carlo; Levantino, Salvatore
A 12.5GHz Fractional-N Type-I Sampling PLL Achieving 58fs Integrated Jitter
2020-01-01 Mercandelli, M.; Santiccioli, A.; Parisi, A.; Bertulessi, L.; Cherniak, D.; Lacaita, A. L.; Samori, C.; Levantino, S.
A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping
2022-01-01 Dartizio, Simone M.; Tesolin, Francesco; Mercandelli, Mario; Santiccioli, Alessio; Shehata, Abanob; Karman, Saleh; Bertulessi, Luca; Buccoleri, Francesco; Avallone, Luca; Parisi, Angelo; Lacaita, Andrea L.; Kennedy, Michael P.; Samori, Carlo; Levantino, Salvatore
A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter
2021-01-01 Mercandelli, M.; Santiccioli, A.; Dartizio, S. M.; Shehata, A.; Tesolin, F.; Karman, S.; Bertulessi, L.; Buccoleri, F.; Avallone, L.; Parisi, A.; Lacaita, A. L.; Kennedy, M. P.; Samori, C.; Levantino, S.
A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang-Bang PLL With Digital Frequency-Error Recovery for Fast Locking
2020-01-01 Santiccioli, Alessio; Mercandelli, Mario; Bertulessi, Luca; Parisi, Angelo; Cherniak, Dmytro; Lacaita, Andrea L.; Samori, Carlo; Levantino, Salvatore
A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking
2020-01-01 Santiccioli, A.; Mercandelli, M.; Bertulessi, L.; Parisi, A.; Cherniak, D.; Lacaita, A. L.; Samori, C.; Levantino, S.
A PLL-Based Digital Technique for Orthogonal Correction of ADC Non-Linearity
2021-01-01 Parisi, Angelo; Mercandelli, Mario; Samori, Carlo; Lacaita, ANDREA LEONARDO
Self-Biasing Dynamic Start-up Circuit for Current-Biased Class-C Oscillators
2021-01-01 Parisi, A.; Tesolin, F.; Mercandelli, M.; Bertulessi, L.; Lacaita, A. L.
Skew and Jitter Performance in CMOS Clock Phase Splitter Circuits
2021-01-01 Scaletti, L.; Parisi, A.; Bertulessi, L.