RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

BREVEGLIERI, LUCA ODDONE
 Distribuzione geografica
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Continente #
NA - Nord America 7.661
EU - Europa 2.513
AS - Asia 550
AF - Africa 16
SA - Sud America 11
Continente sconosciuto - Info sul continente non disponibili 10
OC - Oceania 9
Totale 10.770
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Nazione #
US - Stati Uniti d'America 7.438
IT - Italia 610
UA - Ucraina 489
SE - Svezia 297
VN - Vietnam 248
DE - Germania 229
CA - Canada 222
FI - Finlandia 194
GB - Regno Unito 185
CN - Cina 151
AT - Austria 138
IE - Irlanda 94
ES - Italia 70
NL - Olanda 57
IN - India 47
FR - Francia 43
GR - Grecia 43
JO - Giordania 30
BE - Belgio 25
TR - Turchia 23
JP - Giappone 16
HU - Ungheria 13
EU - Europa 10
KR - Corea 10
CI - Costa d'Avorio 9
SG - Singapore 9
AU - Australia 7
BR - Brasile 6
CH - Svizzera 6
BG - Bulgaria 4
CO - Colombia 4
ID - Indonesia 4
SK - Slovacchia (Repubblica Slovacca) 4
RO - Romania 3
RU - Federazione Russa 3
ZA - Sudafrica 3
HK - Hong Kong 2
MU - Mauritius 2
NZ - Nuova Zelanda 2
PK - Pakistan 2
PL - Polonia 2
AE - Emirati Arabi Uniti 1
AL - Albania 1
CR - Costa Rica 1
CZ - Repubblica Ceca 1
DK - Danimarca 1
DZ - Algeria 1
GH - Ghana 1
IL - Israele 1
IQ - Iraq 1
IR - Iran 1
KH - Cambogia 1
MY - Malesia 1
PE - Perù 1
PH - Filippine 1
PT - Portogallo 1
TW - Taiwan 1
Totale 10.770
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Città #
Fairfield 995
Woodbridge 919
Chandler 642
Ann Arbor 611
Houston 603
Wilmington 506
Ashburn 504
Seattle 439
Cambridge 342
Jacksonville 293
Dearborn 271
Ottawa 172
Lawrence 136
Vienna 134
Dong Ket 118
Milan 105
Medford 102
Dublin 93
Beijing 73
Des Moines 70
San Diego 66
New York 62
Helsinki 59
Málaga 58
Amsterdam 40
North York 37
Princeton 34
Boardman 33
Amman 30
Auburn Hills 29
Brussels 23
Washington 21
Izmir 19
Redwood City 19
Norwalk 17
Rome 16
Mountain View 15
Shanghai 14
London 13
Indiana 11
Stockholm 10
Verona 10
Abidjan 9
Bergamo 9
Edinburgh 9
Falls Church 9
Hefei 8
Kunming 8
Miami 8
Nanjing 8
Szeged 8
Los Angeles 7
Badalona 6
Florence 6
Guangzhou 6
Dallas 5
Helmond 5
Munich 5
Nanchang 5
Osaka 5
Seongnam 5
Tappahannock 5
Turin 5
Umeda 5
Valdagno 5
Duncan 4
Erba 4
Fremont 4
Madrid 4
Parma 4
San Francisco 4
Yellow Springs 4
Atlanta 3
Berlin 3
Bologna 3
Budapest 3
Campinas 3
Chengdu 3
Chicago 3
Columbus 3
Cozzo 3
Fino Mornasco 3
Genoa 3
Grenoble 3
Groningen 3
Hounslow 3
Kilburn 3
Les Ulis 3
Medellín 3
Minneapolis 3
Montreal 3
Montréal 3
Padova 3
Portland 3
Saronno 3
Siziano 3
Sofia 3
Torino 3
Vicenza 3
Almenara 2
Totale 8.026
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Nome #
Fault Sensitivity Analysis at Design Time 165
A fault-based secret key retrieval method for ECDSA: analysis and countermeasure 160
Computer Security Anchors in Smart Grids: The Smart Metering Scenario and Challenges 158
A digital front-end and readout microsystem for calorimetry at LHC 132
A fault attack against the FOX cipher family 128
Low-power Architectures for Mobile Systems 127
AES power attack based on induced cache miss and countermeasure 120
About the performances of the advanced encryption standard in embedded systems with cache memory 117
Optimized digital feature extraction in the FERMI microsystem 116
A note on the error detection in an RSA architecture by means of residue codes 116
Efficient software implementation of AES on 32-bit platforms 115
Programming highly parallel reconfigurable architectures for symmetric and asymmetric cryptographic applications 115
Speeding up AES by extending a 32-bit processor instruction set 113
Deterministic parsing for augmented context-free grammars 110
A serial-input serial-output bit-sliced convolver 108
Error analysis and detection procedures for a hardware implementation of the advanced encryption standard 105
Finding optimum parallel coprocessor design for genus 2 hyperelliptic curve cryptosystems 104
Countermeasures against branch target buffer attacks 103
Fast arithmetic and fault tolerance in the FERMI system 103
Parallel architectures for elliptic curve cryptoprocessors over binary extension fields 103
Design Time Engineering of Side Channel Resistant Cipher Implementations 100
Power aware design of an elliptic curve coprocessor for 8-bit platforms 99
A parallelized design for an elliptic curve cryptosystem coprocessor 99
Formal Languages and Compilation 99
Smart metering in power grids: Application scenarios and security 98
A secure and authenticated host-to-memory communication interface 98
Performance of HECC coprocessors using inversion-free formulae 97
An efficient hardware-based fault diagnosis scheme for AES: performances and cost 96
Formal Languages and Compilation 96
Linguaggi formali e compilazione - 2a edizione 96
ECC hardware coprocessors for 8-bit systems and power consumption considerations 95
null 95
Software-only reverse engineering of physical dram mappings for rowhammer attacks 95
A Fault Induction Technique Based on Voltage Underfeeding with Application to Attacks against AES and RSA 93
From Ambiguous Regular Expressions to Deterministic Parsing Automata 93
Designing and testing of a microprogrammed fault tolerant CPU 92
Detecting faults in four symmetric key block ciphers 91
Parallel hardware architectures for the cryptographic Tate pairing 90
A VLSI inner product macrocell 90
Multi-push-down languages and grammars 90
Balancing of fault tolerance in the new version of the FERMI channel chip: a functional evaluation 89
Bit-serial fault-tolerant architectures for convolution and polynomial evaluation 88
Guest editors' introduction: special section on fault diagnosis and tolerance in cryptography 87
A pairing SW implementation for smart-cards 87
Concurrent fault detection in a hardware implementation of the RC5 encryption algorithm 87
Modeling operating systems schedulers with multi-stack-queue grammars 86
A Benchmark Production Tool for Regular Expressions 86
A parity code based fault detection for an implementation of the advanced encryption standard 85
Testing of serial input convolvers 85
Testing of serial input convolvers 84
Evaluation of FERMI readout of the ATLAS tilecal prototype 84
Detecting and locating faults in VLSI implementations of the advanced encryption standard 83
On the propagation of faults and their detection in a hardware implementation of the advanced encryption standard 83
On-line testing for secure implementations: design and validation 82
BSP: A Parsing Tool for Ambiguous Regular Expressions 82
A VLSI inner product macrocell 82
An operation-centered approach to fault detection in symmetric cryptography ciphers 81
A 640 Mbit/s 32-bit pipelined implementation of the AES algorithm 81
Column compression pipelined multipliers 81
Can knowledge regarding the presence of countermeasures against fault attacks simplify power attacks on cryptographic devices ? 80
Practical power analysis attacks to RSA on a large IP portfolio SoC 80
On the generalized linear equivalence of functions over finite fields 80
A low-latency serial architecture for the 1-D discrete wavelet transform 80
A FPGA coprocessor for the cryptographic Tate pairing over Fp 80
A fast pipelined complex convolver 79
A model for the evaluation of fault tolerance in the FERMI system 78
Incorporating error detection in an RSA architecture 78
Efficient finite field digit-serial multiplier architecture for cryptography applications 78
Efficient AES implementations for ARM based platforms 76
Fault injection attacks on cryptographic devices: theory, practice, and countermeasures 76
Power attacks resistance of cryptographic S-boxes with added error detection circuits 75
Design and implementation of a VLSI serial multiplier for fixed point numbers with self-checking capability 75
Fault attack on AES with single-bit induced faults 75
Error detection in digital neural networks: an algorithmic-based approach for inner product protection 75
Fault attack to the elliptic curve digital signature algorithm with multiple bit faults 74
Fault Diagnosis and Tolerance in Cryptography [LECTURE NOTES IN COMPUTER SCIENCE, Vol. 4236] 72
Low voltage fault attacks to AES 72
Incorporating error detection and online reconfiguration into a regular architecture for the advanced encryption standard 72
Pipelined median filters 71
A fast pipelined FFT unit 71
Modular design methodologies for image processing architectures 71
Efficient recognition of trace languages defined by repeat-until loops 70
Shift-Reduce Parsers for Transition Networks 69
Window-based dedicated parallel architectures for image processing 69
A generalized LR(1) parser for extended context-free grammars 69
Detecting faults in integer and finite field arithmetic operations for cryptography 68
Design and implementation of a VLSI serial multiplier for fixed point numbers with self-checking capability 68
Comparative cost/performance evaluation of digit-serial multipliers for finite fields of type GF(2n) 67
Injection Technologies for Fault Attacks on Microprocessors 67
Highly modular architectures for digital median filtering 66
Architetture per algoritmi locali per elaborazione di segnale e di immagine 66
Parallel hardware architectures for the cryptographic Tate pairing 66
Real-time scheduling by queue automata 65
Fair expressions and regular languages over lists 65
Implementing ghost bit-based algorithms for elliptic curve cryptosystems 64
Complexity of extended vs classic LR parsers 64
Fast pipelined multipliers for bit-serial complex numbers 63
Fast deterministic parsers for transition networks 63
FERMI - A new generation of electronic modules for large data acquisition arrays required for high energy physics 62
Workshop on fault diagnosis and tolerance in cryptography 62
Totale 8.844
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Categoria #
all - tutte 30.231
article - articoli 7.140
book - libri 783
conference - conferenze 18.770
curatela - curatele 1.014
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 1.988
Totale 59.926
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2018/2019948 0 0 0 0 0 0 0 0 0 223 378 347
2019/20202.859 158 202 67 209 328 439 350 229 320 128 325 104
2020/20211.521 153 63 166 67 142 74 117 152 82 137 76 292
2021/20221.245 42 178 98 33 198 70 64 75 45 74 138 230
2022/20231.468 163 128 42 155 184 189 10 114 233 99 110 41
2023/2024708 53 130 42 79 76 116 52 54 11 95 0 0
Totale 10.923