BREVEGLIERI, LUCA ODDONE

BREVEGLIERI, LUCA ODDONE  

DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA  

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Risultati 1 - 20 di 142 (tempo di esecuzione: 0.032 secondi).
Titolo Data di pubblicazione Autori File
A 640 Mbit/s 32-bit pipelined implementation of the AES algorithm 1-gen-2008 BERTONI, GUIDO MARCOBREVEGLIERI, LUCA ODDONE +
A comparative evaluation of bit-serial convolvers 1-gen-1989 BREVEGLIERI, LUCA ODDONEDADDA, LUIGISCIUTO, DONATELLA +
A complete formulation of generalized affine equivalence 1-gen-2005 BREVEGLIERI, LUCA ODDONECAIRONI, MARIOCHERUBINI, ALESSANDRAMACCHETTI, MARCO
A digital front-end and readout microsystem for calorimetry at LHC 1-gen-1993 ALIPPI, CESAREBREVEGLIERI, LUCA ODDONEDADDA, LUIGIPIURI, VINCENZOSALICE, FABIOSAMI, MARIAGIOVANNASTEFANELLI, RENATO +
A fast pipelined complex convolver 1-gen-1992 BREVEGLIERI, LUCA ODDONEPIURI, VINCENZO
A fast pipelined complex multiplier: the fault tolerance issue 1-gen-1992 BREVEGLIERI, LUCA ODDONEPIURI, VINCENZOSCIUTO, DONATELLA
A fast pipelined FFT unit 1-gen-1994 BREVEGLIERI, LUCA ODDONEDADDA, LUIGI
A fault attack against the FOX cipher family 1-gen-2006 BREVEGLIERI, LUCA ODDONEMAISTRI, PAOLO +
A low-latency serial architecture for the 1-D discrete wavelet transform 1-gen-1997 BREVEGLIERI, LUCA ODDONEPIURI, VINCENZO +
A model for the evaluation of fault tolerance in the FERMI system 1-gen-1995 ANTOLA, ANNA MARIABREVEGLIERI, LUCA ODDONE
A modular bit-serial convolver 1-gen-1989 BREVEGLIERI, LUCA ODDONEDADDA, LUIGI
A modular fault-tolerant approach to design a digital front-end microsystem for calorimetry at LHC 1-gen-1994 BREVEGLIERI, LUCA ODDONEPIURI, VINCENZO
A note on the error detection in an RSA architecture by means of residue codes 1-gen-2006 BREVEGLIERI, LUCA ODDONEMAISTRI, PAOLO +
A pairing SW implementation for smart-cards 1-gen-2008 BREVEGLIERI, LUCA ODDONEPELOSI, GERARDO +
A parallelized design for an elliptic curve cryptosystem coprocessor 1-gen-2005 BERTONI, GUIDO MARCOBREVEGLIERI, LUCA ODDONESOZZANI, FRANCA +
A power attack methodology to AES based on induced cache misses: procedure, evaluation and possible countermeasures 1-gen-2006 BERTONI, GUIDO MARCOBREVEGLIERI, LUCA ODDONEMONCHIERO, MATTEOPALERMO, GIANLUCAZACCARIA, VITTORIO
A serial discrete wavelet transform processor 1-gen-1998 BREVEGLIERI, LUCA ODDONEPIURI, VINCENZO +
A serial-input serial-output bit-sliced convolver 1-gen-1988 BREVEGLIERI, LUCA ODDONEDADDA, LUIGI
A testable fault-tolerant digital filter for the FERMI readout microsystem 1-gen-1998 BREVEGLIERI, LUCA ODDONE +
A VLSI inner product macrocell 1-gen-1998 BREVEGLIERI, LUCA ODDONEDADDA, LUIGI