The paper discusses implementation guidelines of a prototype of amicroprogrammed Central Processing Unit (CPU) designed to achieve tolerance to transient faults by means of microprogram rollback. Aim of this prototype were to prove effectiveness of the signature analysis, adopted as error detection technique, and to evaluate figures of merit related to efficiency of the recovery method. Results of experiments - detailed in the last section - follow theoretical forecastings, showing how the microprogram structure affects the expected detectability.

Designing and testing of a microprogrammed fault tolerant CPU

ANTOLA, ANNA MARIA;BREVEGLIERI, LUCA ODDONE;
1987-01-01

Abstract

The paper discusses implementation guidelines of a prototype of amicroprogrammed Central Processing Unit (CPU) designed to achieve tolerance to transient faults by means of microprogram rollback. Aim of this prototype were to prove effectiveness of the signature analysis, adopted as error detection technique, and to evaluate figures of merit related to efficiency of the recovery method. Results of experiments - detailed in the last section - follow theoretical forecastings, showing how the microprogram structure affects the expected detectability.
fault tolerance; microprogrammed CPU; signature analysis
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/566941
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