The 1-Dimensional Discrete Wavelet Transform is a powerful DSP technique for several application areas. Dedicated VLSI processors are often required by real-time applications due to the high amount of arithmetic operations; the circuit complexity is usually a relevant constraint for several low-cost applications as well as for complex systems having strong dimensional limits on the implementation (e.g., in aerospace applications). This paper presents the architectural design of a low-latency bit-serial 1-Dimensional Wavelet Transform Processor.

A low-latency serial architecture for the 1-D discrete wavelet transform

BREVEGLIERI, LUCA ODDONE;PIURI, VINCENZO;
1997

Abstract

The 1-Dimensional Discrete Wavelet Transform is a powerful DSP technique for several application areas. Dedicated VLSI processors are often required by real-time applications due to the high amount of arithmetic operations; the circuit complexity is usually a relevant constraint for several low-cost applications as well as for complex systems having strong dimensional limits on the implementation (e.g., in aerospace applications). This paper presents the architectural design of a low-latency bit-serial 1-Dimensional Wavelet Transform Processor.
Proceedings of the Innovative Systems in Silicon Conference 1997
0780342763
INF; VLSI; arithmetic; serial architecture; wavelet transform
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11311/569781
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