RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

MERCANDELLI, MARIO
 Distribuzione geografica
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Continente #
NA - Nord America 1.042
EU - Europa 726
AS - Asia 287
SA - Sud America 64
AF - Africa 5
OC - Oceania 1
Totale 2.125
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Nazione #
US - Stati Uniti d'America 1.029
IT - Italia 440
SG - Singapore 116
VN - Vietnam 69
BR - Brasile 58
AT - Austria 45
DE - Germania 38
FI - Finlandia 31
ES - Italia 30
CN - Cina 25
IE - Irlanda 23
GB - Regno Unito 21
FR - Francia 19
BE - Belgio 18
NL - Olanda 15
IN - India 14
SE - Svezia 13
JO - Giordania 12
JP - Giappone 11
PL - Polonia 8
CA - Canada 7
HK - Hong Kong 7
MX - Messico 5
TW - Taiwan 5
GR - Grecia 4
KR - Corea 4
UA - Ucraina 4
ID - Indonesia 3
IL - Israele 3
KG - Kirghizistan 3
TR - Turchia 3
AR - Argentina 2
AZ - Azerbaigian 2
BD - Bangladesh 2
CZ - Repubblica Ceca 2
LK - Sri Lanka 2
LV - Lettonia 2
RO - Romania 2
RU - Federazione Russa 2
AL - Albania 1
BG - Bulgaria 1
BJ - Benin 1
BO - Bolivia 1
CH - Svizzera 1
CL - Cile 1
DK - Danimarca 1
EE - Estonia 1
EG - Egitto 1
HN - Honduras 1
HU - Ungheria 1
IQ - Iraq 1
IR - Iran 1
KW - Kuwait 1
KZ - Kazakistan 1
LT - Lituania 1
MA - Marocco 1
NO - Norvegia 1
NZ - Nuova Zelanda 1
PE - Perù 1
PH - Filippine 1
PT - Portogallo 1
PY - Paraguay 1
SC - Seychelles 1
TJ - Tagikistan 1
ZA - Sudafrica 1
Totale 2.125
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Città #
Chandler 209
Milan 152
Fairfield 87
Santa Clara 80
Singapore 69
Dong Ket 52
Ashburn 50
Seattle 43
Vienna 40
Woodbridge 39
Houston 35
Wilmington 33
Cambridge 31
Redmond 31
Málaga 28
Ann Arbor 27
Boardman 21
Dublin 21
Council Bluffs 19
Lawrence 19
Helsinki 18
Medford 17
San Diego 17
New York 13
Turin 13
Amman 12
Munich 11
Amsterdam 10
Brescia 10
Redwood City 10
Legnano 9
London 9
Palazzolo sull'Oglio 9
Sesto San Giovanni 9
Beijing 8
Lappeenranta 8
Rome 8
Castilenti 7
Heverlee 7
Tokyo 7
Brussels 6
Duncan 6
Pordenone 6
São Paulo 6
Fara Gera D'adda 5
Frankfurt am Main 5
Genoa 5
Goodyear 5
Grafing 5
Norwalk 5
Taiyuan 5
Turku 5
Washington 5
Bergamo 4
Chicago 4
Columbus 4
Fremont 4
Irvine 4
Ottawa 4
Reggio Nell'emilia 4
Roubaix 4
San Mateo 4
Vimodrone 4
Wroclaw 4
Barge 3
Bengaluru 3
Bishkek 3
Brasília 3
Edinburgh 3
Jakarta 3
Los Angeles 3
Monza 3
Phoenix 3
Pátrai 3
Ribeirão Preto 3
San Giuliano Milanese 3
San Jose 3
Shanghai 3
Vedano al Lambro 3
Anyang-si 2
Baku 2
Bari 2
Berlin 2
Bologna 2
Boydton 2
Buxtehude 2
Cantù 2
Como 2
Cuveglio 2
Dallas 2
Dhaka 2
Hong Kong 2
Kilburn 2
Kyiv 2
Lainate 2
Leuven 2
Malmo 2
Mexico City 2
New Taipei 2
Nuremberg 2
Totale 1.498
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Nome #
A 1.6-to-3.0-GHz Fractional-N MDLL With a Digital-to-Time Converter Range-Reduction Technique Achieving 397-fs Jitter at 2.5-mW Power 156
A 900-MS/s SAR-based Time-Interleaved ADC with a Fully Programmable Interleaving Factor and On-Chip Scalable Background Calibrations 140
A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter 136
A Background Calibration Technique to Control the Bandwidth of Digital PLLs 134
A 1.6-to-3.0-GHz Fractional-N MDLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 397fs Jitter at 2.5-mW Power 130
A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping 127
A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang-Bang PLL With Digital Frequency-Error Recovery for Fast Locking 122
32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays 112
A 10.2-ENOB, 150-MS/s redundant SAR ADC with a quasi-monotonic switching algorithm for time-interleaved converters 105
A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter 104
A PLL-Based Digital Technique for Orthogonal Correction of ADC Non-Linearity 103
RADAR SIGNAL MODULATOR WITH BANDWIDTH COMPENSATION AND FREQUENCY OFFSET SEQUENCE 101
A 12.5GHz Fractional-N Type-I Sampling PLL Achieving 58fs Integrated Jitter 101
A 250Mb/s Direct Phase Modulator with -42.4dB EVM Based on a 14GHz Digital PLL 100
A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking 96
Self-Biasing Dynamic Start-up Circuit for Current-Biased Class-C Oscillators 91
A Comprehensive Phase Noise Analysis of Bang-Bang Digital PLLs 85
Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase Noise 69
A 3.7-to-4.1GHz Narrowband Digital Bang-Bang PLL with a Multitaps LMS Algorithm to Automatically Control the Bandwidth Achieving 183fs Integrated Jitter 62
A 18.9-22.3GHz Dual-Core Digital PLL with On-Chip Power Combination for Phase Noise and Power Scalability 59
A Timing Skew Correction Technique in Time-Interleaved ADCs Based on a DeltaSigma Digital-to-Time Converter 53
Totale 2.186
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Categoria #
all - tutte 8.440
article - articoli 4.342
book - libri 0
conference - conferenze 3.877
curatela - curatele 0
other - altro 0
patent - brevetti 221
selected - selezionate 0
volume - volumi 0
Totale 16.880
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/202023 0 0 0 0 0 0 0 0 0 0 15 8
2020/2021333 26 10 42 27 26 8 9 10 18 44 15 98
2021/2022391 18 17 31 51 19 6 37 49 86 15 34 28
2022/2023554 49 47 22 91 46 58 19 27 91 53 44 7
2023/2024189 18 26 25 10 13 21 10 14 7 16 8 21
2024/2025554 1 30 34 4 105 30 53 72 98 36 91 0
Totale 2.186