A novel technique for automatic digital estimation and foreground correction of static distortion in Analog-to-Digital Converters (ADCs) is presented. The system exploits numerical Phase-Locked Loops (NPLLs) to autonomously generate a distortion-less replica of the input signal and to detect the spurs due to the ADC non linearity. The information is then fed to filters adaptively estimating, via Least Mean Squares (LMS) algorithms, a polynomial correction from the orthogonal inverse series. The solution is fully digital, does not require post-processing and can be expanded to cancel out the static distortion up to an arbitrary order. Performance is tested by simulations on a 12 bit ADC operating at 200MHz with a native Signal-to-Noise and Distortion Ratio (SINAD) of 54.9dB. Polynomial compensation up to the third order is generated in 1ms, improving the SINAD by 12dB and adding 2 effective bits of resolution and more than doubling the input range of the converter.

A PLL-Based Digital Technique for Orthogonal Correction of ADC Non-Linearity

Angelo Parisi;Mario Mercandelli;Carlo Samori;Andrea Leonardo Lacaita
2021

Abstract

A novel technique for automatic digital estimation and foreground correction of static distortion in Analog-to-Digital Converters (ADCs) is presented. The system exploits numerical Phase-Locked Loops (NPLLs) to autonomously generate a distortion-less replica of the input signal and to detect the spurs due to the ADC non linearity. The information is then fed to filters adaptively estimating, via Least Mean Squares (LMS) algorithms, a polynomial correction from the orthogonal inverse series. The solution is fully digital, does not require post-processing and can be expanded to cancel out the static distortion up to an arbitrary order. Performance is tested by simulations on a 12 bit ADC operating at 200MHz with a native Signal-to-Noise and Distortion Ratio (SINAD) of 54.9dB. Polynomial compensation up to the third order is generated in 1ms, improving the SINAD by 12dB and adding 2 effective bits of resolution and more than doubling the input range of the converter.
2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)
978-172818281-0
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11311/1194538
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