MERCANDELLI, MARIO
 Distribuzione geografica
Continente #
EU - Europa 209
AS - Asia 86
NA - Nord America 81
SA - Sud America 2
Totale 378
Nazione #
IT - Italia 135
US - Stati Uniti d'America 79
CN - Cina 18
FR - Francia 13
JP - Giappone 11
BE - Belgio 10
TW - Taiwan 9
DE - Germania 8
KR - Corea 8
HK - Hong Kong 7
IN - India 7
NL - Olanda 6
AT - Austria 5
CH - Svizzera 5
SG - Singapore 5
GB - Regno Unito 4
IQ - Iraq 4
RU - Federazione Russa 4
TR - Turchia 4
VN - Vietnam 4
ES - Italia 3
RO - Romania 3
UA - Ucraina 3
CZ - Repubblica Ceca 2
IR - Iran 2
MO - Macao, regione amministrativa speciale della Cina 2
MY - Malesia 2
OM - Oman 2
PT - Portogallo 2
AR - Argentina 1
BG - Bulgaria 1
BR - Brasile 1
CA - Canada 1
FI - Finlandia 1
GR - Grecia 1
HN - Honduras 1
IE - Irlanda 1
IL - Israele 1
PL - Polonia 1
SE - Svezia 1
Totale 378
Città #
Milan 60
Ashburn 7
Pavia 6
Santa Cruz 6
Shanghai 6
Rome 5
San Diego 5
Al Hillah 4
Central 4
Suzhou 4
Atlanta 3
Bucharest 3
Chicago 3
Fairfield 3
Las Vegas 3
Los Angeles 3
Seongbuk-gu 3
Villach 3
Ankara 2
Atsugi 2
Barcelona 2
Bengaluru 2
Buffalo 2
Enschede 2
Frankfurt am Main 2
Geneva 2
Graz 2
Grenchen 2
Hangzhou 2
Hanoi 2
Heverlee 2
Hsinchu 2
Legnano 2
Leuven 2
Livorno 2
Marseille 2
Ramenskoye 2
San Jose 2
Singapore 2
Sokal 2
Suri 2
Suwon 2
Taipei 2
Taoyuan District 2
Tehran 2
Turin 2
Woodbridge 2
Yokohama 2
Anaheim 1
Aosta 1
Arau 1
Athens 1
Azzano San Paolo 1
Bend 1
Bhubaneswar 1
Bien Hoa 1
Boulder 1
Braunschweig 1
Brescia 1
Bresso 1
Cambridge 1
Carlisle 1
Castellammare di Stabia 1
Chennai 1
Columbus 1
Dallas 1
Delft 1
Dieppe 1
Dublin 1
Enfield 1
Gangnam-gu 1
Gdansk 1
Genoa 1
George Town 1
Ghent 1
Helsinki 1
Ho Chi Minh City 1
Hong Kong 1
Houston 1
Ingoldingen 1
Kasumicho 1
Kosekoy 1
La Spezia 1
Leiria 1
Lins 1
Lisbon 1
London 1
Macao 1
Madrid 1
Manchester 1
Mauleon 1
Miami 1
Monselice 1
Montreal 1
Munich 1
Muscat 1
New Taipei 1
New York 1
Osaka 1
Padova 1
Totale 243
Nome #
Self-Biasing Dynamic Start-up Circuit for Current-Biased Class-C Oscillators, file e0c31c11-b1dc-4599-e053-1705fe0aef77 167
A PLL-Based Digital Technique for Orthogonal Correction of ADC Non-Linearity, file e0c31c12-27be-4599-e053-1705fe0aef77 123
Self-Biasing Dynamic Start-up Circuit for Current-Biased Class-C Oscillators, file e0c31c11-b1db-4599-e053-1705fe0aef77 17
A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping, file e0c31c11-bdec-4599-e053-1705fe0aef77 8
A 250Mb/s Direct Phase Modulator with -42.4dB EVM Based on a 14GHz Digital PLL, file e0c31c0f-c8a5-4599-e053-1705fe0aef77 7
A Background Calibration Technique to Control the Bandwidth of Digital PLLs, file e0c31c0c-6b87-4599-e053-1705fe0aef77 6
A 12.5GHz Fractional-N Type-I Sampling PLL Achieving 58fs Integrated Jitter, file e0c31c0f-e17e-4599-e053-1705fe0aef77 5
A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter, file e0c31c11-f3b5-4599-e053-1705fe0aef77 5
A Background Calibration Technique to Control the Bandwidth of Digital PLLs, file e0c31c0c-9543-4599-e053-1705fe0aef77 4
A 1.6-to-3.0-GHz Fractional-N MDLL With a Digital-to-Time Converter Range-Reduction Technique Achieving 397-fs Jitter at 2.5-mW Power, file e0c31c0e-8012-4599-e053-1705fe0aef77 4
32.8 A 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based LO Phase-Shifting System with Digital Background Phase-Offset Correction for Integrated Phased Arrays, file e0c31c10-a067-4599-e053-1705fe0aef77 4
A 12.5-GHz Fractional-N Type-I Sampling PLL Achieving 58-fs Integrated Jitter, file e0c31c12-7d9f-4599-e053-1705fe0aef77 4
Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase Noise, file e0c31c12-991b-4599-e053-1705fe0aef77 4
A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking, file e0c31c0f-e180-4599-e053-1705fe0aef77 3
A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang-Bang PLL With Digital Frequency-Error Recovery for Fast Locking, file e0c31c10-007c-4599-e053-1705fe0aef77 3
A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang-Bang PLL With Digital Frequency-Error Recovery for Fast Locking, file e0c31c10-bae6-4599-e053-1705fe0aef77 3
A Timing Skew Correction Technique in Time-Interleaved ADCs Based on a DeltaSigma Digital-to-Time Converter, file e0c31c11-7fa0-4599-e053-1705fe0aef77 3
A 10.2-ENOB, 150-MS/s redundant SAR ADC with a quasi-monotonic switching algorithm for time-interleaved converters, file 00c77365-1dcb-4f0d-a732-886efb41bd7e 2
A Comprehensive Phase Noise Analysis of Bang-Bang Digital PLLs, file e0c31c10-f770-4599-e053-1705fe0aef77 2
A 18.9-22.3GHz Dual-Core Digital PLL with On-Chip Power Combination for Phase Noise and Power Scalability, file e0c31c11-6394-4599-e053-1705fe0aef77 2
A Comprehensive Phase Noise Analysis of Bang-Bang Digital PLLs, file e0c31c11-7592-4599-e053-1705fe0aef77 2
A PLL-Based Digital Technique for Orthogonal Correction of ADC Non-Linearity, file e0c31c12-6cdd-4599-e053-1705fe0aef77 2
A 900-MS/s SAR-based Time-Interleaved ADC with a Fully Programmable Interleaving Factor and On-Chip Scalable Background Calibrations, file 0e47c3ec-5efd-49ea-ae15-6591f23d752b 1
Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase Noise, file 4b178ef4-db41-4f6d-970d-d982e17d0fd8 1
A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping, file 93c4ea14-083d-4128-900f-e6ddf7934922 1
A 1.6-to-3.0-GHz Fractional-N MDLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 397fs Jitter at 2.5-mW Power, file e0c31c0e-2925-4599-e053-1705fe0aef77 1
A 3.7-to-4.1GHz Narrowband Digital Bang-Bang PLL with a Multitaps LMS Algorithm to Automatically Control the Bandwidth Achieving 183fs Integrated Jitter, file e0c31c11-ef0b-4599-e053-1705fe0aef77 1
A 12.9-to-15.1GHz Digital PLL Based on a Bang-Bang Phase Detector with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter, file e0c31c12-6848-4599-e053-1705fe0aef77 1
Totale 386
Categoria #
all - tutte 723
article - articoli 412
book - libri 0
conference - conferenze 311
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 1.446


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2018/20194 0 0 0 0 0 0 0 0 0 0 4 0
2019/20204 0 0 0 0 2 0 0 2 0 0 0 0
2020/202121 5 0 1 4 2 0 0 0 3 6 0 0
2021/202298 0 1 14 16 0 0 10 6 20 11 12 8
2022/2023113 3 4 11 10 9 8 11 7 10 4 19 17
2023/2024145 18 14 19 14 17 18 12 13 6 12 2 0
Totale 386