SCIUTO, DONATELLA
 Distribuzione geografica
Continente #
NA - Nord America 33.614
EU - Europa 15.976
AS - Asia 9.348
SA - Sud America 2.664
AF - Africa 481
OC - Oceania 45
Continente sconosciuto - Info sul continente non disponibili 19
Totale 62.147
Nazione #
US - Stati Uniti d'America 32.942
RU - Federazione Russa 6.233
SG - Singapore 4.140
CN - Cina 2.688
IT - Italia 2.552
BR - Brasile 2.318
UA - Ucraina 1.276
VN - Vietnam 1.183
SE - Svezia 1.079
DE - Germania 978
GB - Regno Unito 814
FI - Finlandia 719
AT - Austria 620
CA - Canada 516
IE - Irlanda 394
ES - Italia 257
NL - Olanda 253
FR - Francia 249
MA - Marocco 247
IN - India 226
KR - Corea 144
PL - Polonia 144
AR - Argentina 135
CH - Svizzera 131
BD - Bangladesh 119
JO - Giordania 106
HK - Hong Kong 91
ID - Indonesia 90
TR - Turchia 88
MX - Messico 85
IQ - Iraq 79
BE - Belgio 74
JP - Giappone 69
ZA - Sudafrica 69
CI - Costa d'Avorio 53
EC - Ecuador 52
PK - Pakistan 46
AE - Emirati Arabi Uniti 37
VE - Venezuela 37
UZ - Uzbekistan 34
CO - Colombia 31
PY - Paraguay 31
GR - Grecia 30
AU - Australia 29
RO - Romania 29
SA - Arabia Saudita 28
KE - Kenya 25
AZ - Azerbaigian 19
CL - Cile 19
CZ - Repubblica Ceca 19
TW - Taiwan 19
PE - Perù 18
EU - Europa 16
LT - Lituania 16
KG - Kirghizistan 14
NP - Nepal 14
UY - Uruguay 14
DZ - Algeria 13
IL - Israele 13
PH - Filippine 13
EG - Egitto 12
IR - Iran 12
JM - Giamaica 12
NZ - Nuova Zelanda 12
OM - Oman 12
PT - Portogallo 12
BJ - Benin 11
LU - Lussemburgo 11
RS - Serbia 11
CR - Costa Rica 10
DO - Repubblica Dominicana 10
KZ - Kazakistan 10
AM - Armenia 9
BO - Bolivia 9
EE - Estonia 9
MY - Malesia 9
TN - Tunisia 9
AL - Albania 8
HN - Honduras 8
LV - Lettonia 8
DK - Danimarca 7
MU - Mauritius 7
BG - Bulgaria 6
ET - Etiopia 6
NO - Norvegia 6
BY - Bielorussia 5
LB - Libano 5
NI - Nicaragua 5
PA - Panama 5
SK - Slovacchia (Repubblica Slovacca) 5
TT - Trinidad e Tobago 5
BB - Barbados 4
BH - Bahrain 4
LK - Sri Lanka 4
PS - Palestinian Territory 4
SM - San Marino 4
SN - Senegal 4
AO - Angola 3
BS - Bahamas 3
CY - Cipro 3
Totale 62.076
Città #
Fairfield 4.281
Ashburn 3.623
Woodbridge 3.261
Houston 2.392
Chandler 2.145
Singapore 2.010
Ann Arbor 1.825
Wilmington 1.825
Seattle 1.743
Cambridge 1.455
Santa Clara 981
Moscow 874
Jacksonville 766
Milan 713
Beijing 676
Dearborn 601
Vienna 589
Boardman 563
Hefei 500
Council Bluffs 495
Lawrence 461
Dong Ket 419
San Jose 390
Dublin 384
Ottawa 374
Medford 373
Los Angeles 339
San Diego 250
Des Moines 220
Helsinki 216
Málaga 209
Dallas 197
São Paulo 187
Ho Chi Minh City 179
Buffalo 173
New York 168
London 163
The Dalles 162
Casablanca 133
Hanoi 110
Warsaw 110
Amsterdam 108
Amman 105
Bern 105
Frankfurt am Main 101
Auburn Hills 100
Princeton 99
Seoul 96
Kenitra 88
Hong Kong 76
Chicago 72
Rio de Janeiro 71
Brussels 68
Rome 66
Jakarta 64
Shanghai 59
Kent 55
Orem 54
Washington 54
Guangzhou 53
Redwood City 53
Tokyo 53
Abidjan 51
Columbus 51
Brasília 50
Brooklyn 50
Mountain View 46
Phoenix 46
Istanbul 45
Atlanta 44
Curitiba 44
Belo Horizonte 42
Montreal 41
Norwalk 41
Tianjin 40
Johannesburg 39
Stockholm 38
Turku 36
Salvador 34
Munich 33
Verona 33
Chennai 32
Düsseldorf 32
Redondo Beach 32
Campinas 31
Chengdu 29
Naples 29
Seongnam 29
Tashkent 29
Denver 27
Dhaka 27
Mumbai 27
Boston 26
Changsha 26
Manaus 25
Miami 25
Nanjing 25
Baghdad 24
San Francisco 24
Guarulhos 23
Totale 39.461
Nome #
Tecnologie di recupero e separazione di terre rare: stato dell’arte e prospettive 418
Test Generation and Testability Alternatives Exploration of Critical Algorithms for Embedded Applications 301
Optimization strategies in design space exploration 290
Alfa Romeo technical office; Architettura della città; Casabella; Enios; House in Milan; Ina-casa programme; Nostra signora della misericordia; Palazzo bianco/Palazzo rosso; Rational architecture; Triennale di Milano; Velasca tower;Zentrum Paul Klee 288
A Design Kit for a Fully Working Shared Memory Multiprocessor on FPGA 269
A Performance-Aware Quality of Service-Driven Scheduler for Multicore Processors 241
Array partitioning: a methodology for reconfigurability and reconfiguration problems 236
An Evolutionary Approach to Area-Time Optimization of FPGA designs 233
A CMOS fault tolerant architecture for switch-level faults 222
Efficient Hardware Design of Iterative Stencil Loops 218
Adaptive and Flexible Smartphone Power Modeling 217
A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs 212
D-RECS: A complete methodology to implement Self Dynamic Reconfigurable FPGA-based systems 211
A Unified Approach to Canonical Form-based Boolean Matching 210
A Design Framework to Efficiently Explore Energy-Delay Tradeoffs 208
A Design Methodology for the Exploitation of High Level Communication Synthesis 207
HERA Project's Holistic Evolutionary Framework 206
A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture 202
A multiprocessor self-reconfigurable jpeg2000 encoder 200
Fitness Inheritance in Evolutionary and Multi-Objective High-Level Synthesis 200
Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering 199
A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis 197
Pushing the Level of Abstraction of Digital System Design: a Survey on How to Program FPGAs 195
K-Ways Partitioning of Polyhedral Process Networks: A Multi-level Approach 195
Mediation Grammar (CWA 18014:2023) - A testing methodology for measuring the empowerment of users of public services for migrants 194
Faber: a Hardware/Software Toolchain for Image Registration 192
A design methodology to implement memory accesses in High-Level Synthesis 190
Tacit Consent: A Technique to Reduce Redundant Transmissions from Spatially Correlated Nodes in Wireless Sensor Networks 190
A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip 190
Using Speculative Computation and Parallelizing Techniques to Improve Scheduling of Control based Designs 188
cODA: An Open-Source Framework to Easily Design Context-Aware Android Apps 188
A Compact Transactional Memory Multiprocessor System on FPGA 188
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms 187
An instruction-level methodology for power estimation and optimization of embedded VLIW cores 187
An Approach to Functional Testing of VLIW Architectures 187
On the Evolution of Hardware Circuits via Reconfigurable Architectures 186
Reliability Properties Assessment at System Level: A Co-design Framework 185
Automatic parallelization of sequential specifications for symmetric MPSoCs 185
Model-Based Design for Wireless Body Sensor Network Nodes 184
A new switching-level approach to multiple-output functions synthesis 184
A Design Flow Tailored for Self Dynamic Reconfigurable Architecture 182
A System Level Approach in Designing Dual-Duplex Fault Tolerant Embedded Systems 182
Towards a Performance-as-a-Service Cloud 181
On Self-adaptive Resource Allocation through Reinforcement Learning 181
Lightweight DMA management mechanisms for multiprocessors on FPGA 180
A model of soft error effects in generic IP processors 180
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems 179
A Multi-Level Strategy for Software Power Estimation 178
Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems 178
A Framework for the Functional Verification of SystemC Models 178
A2B: an Integrated Framework for Designing Heterogeneous and Reconfigurable Systems 178
FIDA: A framework to automatically integrate FPGA kernels within data-science applications 178
HLS Support for Polymorphic Parallel Memories 178
On the Design and Characterization of Set Packing Problem on Quantum Annealers 177
Analog circuits placement: A constraint driven methodology 177
Experimental evaluation and modeling of thermal phenomena on mobile devices 176
The Case for Polymorphic Registers in Dataflow Computing 176
A dual-priority real-time multiprocessor system on FPGA for automotive applications 176
A Multi-objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis 175
A Power-Efficient Methodology for Mapping Applications on Multi-Processor System-on-Chip Architectures 174
Ant Colony Optimization for Mapping and Scheduling in Heterogeneous Multiprocessor Systems 173
A Scalable FPGA Design for Cloud N-Body Simulation 173
HERA: Hardware evolution over reconfigurable architectures 173
An Architecture for Dynamically Reconfigurable Real Time Audio Processing Systems 172
A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops 172
Hardware DWT accelerator for MultiProcessor System On-Chip on FPGA 171
A Caronte-oriented approach to a network-based educational infrastructure 170
SMASH: A Heuristic Methodology for Designing Partially Reconfigurable MPSoCs 170
Automated Fine-Grained CPU Provisioning for Virtual Machines 170
TaBit: A framework for task graph to bitstream generation 170
An Enhanced Relocation Manager to Speedup Core Allocation in FPGA-based Reconfigurable Systems 170
MPower: towards an adaptive power management system for mobile devices 170
Exploiting TLM and Object Introspection for System-Level Simulation 169
A High-Level Synthesis Flow for the Implementation of Iterative Stencil Loop Algorithms on FPGA Devices 169
Danger-system: Exploring new ways to manage occupants safety in smart building 169
A Comprehensive Methodology to Optimize FPGA Designs via the Roofline Model 169
Reliable System Co-Design: the FIR Case Study 168
Concurrency Emulation and Analysis of Parallel Applications for Multi-Processor System-on-Chip Co-Design 168
Speeding-Up Expensive Evaluations in High-Level Synthesis Using Solution Modeling and Fitness Inheritance 168
MARC: A resource consumption modeling service for self-aware autonomous agents 168
An Interrupt Controller for FPGA-based Multiprocessors 168
B2IRS: A Technique to Reduce BAN-BAN Interferences in Wireless Sensor Networks 167
ReBit: A Tool to Manage and Analyse FPGA-Based Reconfigurable Systems 167
A conceptual analysis framework for low power design of embedded systems 167
Coloring the Cloud for Predictable Performance 166
Towards the Acceleration of the Sparse Blossom Algorithm for Quantum Error Correction 165
ThermOS: System Support for Dynamic Thermal Management of Chip Multi-Processors 165
Morphone.OS: Context-awareness in everyday life 165
OpenMPower: An Open and Accessible Database About Real World Mobile Devices 165
On how to efficiently implement deep learning algorithms on PYNQ platform 164
Metodo per la localizzazione di un dispositivo all'interno di un’area 164
A Transform-Parametric Approach to Boolean Matching 163
The FASTER vision for designing dynamically reconfigurable systems 162
Extensions of the hArtes Tool Chain 161
The Shining embedded system design methodology based on self dynamic reconfigurable architectures 161
A Data Oriented Approach to the Design of Reconfigurable Stream Decoders 160
An Instruction-Level Energy Model for Embedded VLIW Architectures 159
A complete test strategy based on interacting and hierarchical FSMs 159
EMPhASIS: An EMbedded Public Attention Stress Identification System 159
An Assembly-Level Execution-Time Model for Pipelined Architectures 159
Totale 18.812
Categoria #
all - tutte 187.982
article - articoli 40.425
book - libri 2.434
conference - conferenze 133.359
curatela - curatele 395
other - altro 0
patent - brevetti 1.827
selected - selezionate 0
volume - volumi 9.198
Totale 375.620


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20212.951 0 0 0 0 0 0 357 514 358 498 346 878
2021/20224.243 162 602 341 158 564 171 248 203 204 225 528 837
2022/20235.025 613 412 125 544 599 674 50 338 730 322 347 271
2023/20242.349 194 485 185 214 161 260 114 230 16 164 51 275
2024/20258.096 135 141 270 192 1.294 564 383 841 1.260 528 1.306 1.182
2025/202617.276 4.760 5.014 1.387 2.379 1.399 1.719 618 0 0 0 0 0
Totale 62.731