SCIUTO, DONATELLA
 Distribuzione geografica
Continente #
NA - Nord America 38.225
EU - Europa 16.754
AS - Asia 12.828
SA - Sud America 2.794
AF - Africa 524
OC - Oceania 50
Continente sconosciuto - Info sul continente non disponibili 19
Totale 71.194
Nazione #
US - Stati Uniti d'America 37.502
RU - Federazione Russa 6.235
SG - Singapore 4.513
CN - Cina 3.294
IT - Italia 2.625
BR - Brasile 2.403
VN - Vietnam 2.241
UA - Ucraina 1.285
SE - Svezia 1.083
DE - Germania 1.027
GB - Regno Unito 855
KR - Corea 759
FI - Finlandia 752
FR - Francia 721
AT - Austria 623
CA - Canada 539
JP - Giappone 463
IE - Irlanda 401
ES - Italia 271
NL - Olanda 271
IN - India 270
MA - Marocco 253
HK - Hong Kong 201
BD - Bangladesh 161
PL - Polonia 157
AR - Argentina 144
CH - Svizzera 136
JO - Giordania 112
IQ - Iraq 107
ID - Indonesia 106
MX - Messico 100
TR - Turchia 100
TW - Taiwan 89
ZA - Sudafrica 78
BE - Belgio 77
PK - Pakistan 68
EC - Ecuador 63
CI - Costa d'Avorio 54
VE - Venezuela 46
AE - Emirati Arabi Uniti 42
UZ - Uzbekistan 42
AU - Australia 34
PH - Filippine 34
CO - Colombia 33
SA - Arabia Saudita 33
PY - Paraguay 32
GR - Grecia 31
KE - Kenya 29
RO - Romania 29
CL - Cile 27
TH - Thailandia 26
AZ - Azerbaigian 22
CZ - Repubblica Ceca 20
LT - Lituania 20
PE - Perù 20
EG - Egitto 18
EU - Europa 16
JM - Giamaica 16
KG - Kirghizistan 16
NP - Nepal 16
MY - Malesia 15
RS - Serbia 15
UY - Uruguay 15
DZ - Algeria 14
PT - Portogallo 14
IL - Israele 13
OM - Oman 13
AL - Albania 12
IR - Iran 12
KZ - Kazakistan 12
NZ - Nuova Zelanda 12
BJ - Benin 11
CR - Costa Rica 11
DO - Repubblica Dominicana 11
LU - Lussemburgo 11
TN - Tunisia 11
BO - Bolivia 10
ET - Etiopia 10
LV - Lettonia 10
MU - Mauritius 10
AM - Armenia 9
EE - Estonia 9
BG - Bulgaria 8
HN - Honduras 8
SN - Senegal 8
DK - Danimarca 7
LB - Libano 7
NI - Nicaragua 7
NO - Norvegia 7
SK - Slovacchia (Repubblica Slovacca) 6
TT - Trinidad e Tobago 6
BY - Bielorussia 5
HR - Croazia 5
PA - Panama 5
BB - Barbados 4
BH - Bahrain 4
HU - Ungheria 4
LK - Sri Lanka 4
MT - Malta 4
NG - Nigeria 4
Totale 71.104
Città #
Ashburn 4.462
Fairfield 4.281
Woodbridge 3.261
San Jose 2.413
Houston 2.393
Singapore 2.226
Chandler 2.145
Ann Arbor 1.825
Wilmington 1.825
Seattle 1.745
Cambridge 1.455
Santa Clara 1.005
Moscow 874
The Dalles 805
Jacksonville 767
Milan 739
Beijing 708
Seoul 700
Council Bluffs 634
Dearborn 601
Vienna 592
Boardman 563
Hefei 501
Ho Chi Minh City 468
Lawrence 461
Lauterbourg 442
Tokyo 439
Dong Ket 419
Los Angeles 396
Dublin 390
Hanoi 386
Ottawa 374
Medford 373
North Charleston 333
Dallas 319
San Diego 252
Helsinki 249
Des Moines 223
Málaga 209
São Paulo 197
Buffalo 181
New York 180
London 168
Hong Kong 150
Casablanca 137
Frankfurt am Main 129
Amsterdam 122
Warsaw 122
Amman 110
Bern 105
Las Vegas 105
Auburn Hills 100
Princeton 99
Orem 89
Kenitra 88
Chicago 78
Taipei 76
Guangzhou 74
Rio de Janeiro 73
Da Nang 70
Shanghai 70
Rome 69
Brussels 68
Jakarta 67
Washington 57
Kent 55
Columbus 53
Haiphong 53
Redwood City 53
Abidjan 52
Brasília 51
Brooklyn 50
Tianjin 50
Atlanta 49
Istanbul 49
Phoenix 49
Mountain View 46
Curitiba 45
Johannesburg 45
Montreal 45
Belo Horizonte 44
Chennai 44
Stockholm 42
Norwalk 41
Dhaka 37
Baghdad 36
Changsha 36
Turku 36
Mumbai 35
Tashkent 35
Verona 35
Salvador 34
Munich 33
Düsseldorf 32
Redondo Beach 32
Campinas 31
Chengdu 31
Denver 31
Naples 31
Shenzhen 31
Totale 46.489
Nome #
Tecnologie di recupero e separazione di terre rare: stato dell’arte e prospettive 441
Alfa Romeo technical office; Architettura della città; Casabella; Enios; House in Milan; Ina-casa programme; Nostra signora della misericordia; Palazzo bianco/Palazzo rosso; Rational architecture; Triennale di Milano; Velasca tower;Zentrum Paul Klee 324
Test Generation and Testability Alternatives Exploration of Critical Algorithms for Embedded Applications 317
Optimization strategies in design space exploration 315
A Design Kit for a Fully Working Shared Memory Multiprocessor on FPGA 301
A Performance-Aware Quality of Service-Driven Scheduler for Multicore Processors 266
An Evolutionary Approach to Area-Time Optimization of FPGA designs 257
A Unified Approach to Canonical Form-based Boolean Matching 254
Array partitioning: a methodology for reconfigurability and reconfiguration problems 251
A Design Framework to Efficiently Explore Energy-Delay Tradeoffs 250
A CMOS fault tolerant architecture for switch-level faults 246
A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs 239
Efficient Hardware Design of Iterative Stencil Loops 238
Adaptive and Flexible Smartphone Power Modeling 237
A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture 237
A Design Methodology for the Exploitation of High Level Communication Synthesis 231
Mediation Grammar (CWA 18014:2023) - A testing methodology for measuring the empowerment of users of public services for migrants 228
Faber: a Hardware/Software Toolchain for Image Registration 226
A Framework for the Functional Verification of SystemC Models 224
A multiprocessor self-reconfigurable jpeg2000 encoder 224
A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis 224
Pushing the Level of Abstraction of Digital System Design: a Survey on How to Program FPGAs 222
HERA Project's Holistic Evolutionary Framework 222
D-RECS: A complete methodology to implement Self Dynamic Reconfigurable FPGA-based systems 222
A Compact Transactional Memory Multiprocessor System on FPGA 222
A Transform-Parametric Approach to Boolean Matching 220
A Comprehensive Methodology to Optimize FPGA Designs via the Roofline Model 220
Fitness Inheritance in Evolutionary and Multi-Objective High-Level Synthesis 219
Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems 218
K-Ways Partitioning of Polyhedral Process Networks: A Multi-level Approach 218
Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering 213
A Multi-Level Strategy for Software Power Estimation 213
cODA: An Open-Source Framework to Easily Design Context-Aware Android Apps 213
Using Speculative Computation and Parallelizing Techniques to Improve Scheduling of Control based Designs 212
A design methodology to implement memory accesses in High-Level Synthesis 209
MARC: A resource consumption modeling service for self-aware autonomous agents 209
Morphone.OS: Context-awareness in everyday life 206
On the Evolution of Hardware Circuits via Reconfigurable Architectures 206
A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip 206
A model of soft error effects in generic IP processors 206
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms 205
Tacit Consent: A Technique to Reduce Redundant Transmissions from Spatially Correlated Nodes in Wireless Sensor Networks 204
FIDA: A framework to automatically integrate FPGA kernels within data-science applications 204
An Approach to Functional Testing of VLIW Architectures 204
On the Design and Characterization of Set Packing Problem on Quantum Annealers 203
A Multi-objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis 203
Experimental evaluation and modeling of thermal phenomena on mobile devices 203
Plaster: An Embedded FPGA-based Cluster Orchestrator for Accelerated Distributed Algorithms 203
An instruction-level methodology for power estimation and optimization of embedded VLIW cores 202
Automatic parallelization of sequential specifications for symmetric MPSoCs 202
A Design Flow Tailored for Self Dynamic Reconfigurable Architecture 201
A new switching-level approach to multiple-output functions synthesis 201
A dual-priority real-time multiprocessor system on FPGA for automotive applications 201
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems 201
OpenMPower: An Open and Accessible Database About Real World Mobile Devices 201
Model-Based Design for Wireless Body Sensor Network Nodes 200
Towards a Performance-as-a-Service Cloud 199
A Scalable FPGA Design for Cloud N-Body Simulation 199
A System Level Approach in Designing Dual-Duplex Fault Tolerant Embedded Systems 199
MPower: towards an adaptive power management system for mobile devices 198
On Self-adaptive Resource Allocation through Reinforcement Learning 198
A2B: an Integrated Framework for Designing Heterogeneous and Reconfigurable Systems 197
TaBit: A framework for task graph to bitstream generation 197
The Case for Polymorphic Registers in Dataflow Computing 197
HLS Support for Polymorphic Parallel Memories 195
A Caronte-oriented approach to a network-based educational infrastructure 194
Lightweight DMA management mechanisms for multiprocessors on FPGA 194
A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops 194
A Framework for Customizable FPGA-based Image Registration Accelerators 194
A Power-Efficient Methodology for Mapping Applications on Multi-Processor System-on-Chip Architectures 194
A reconfigurable multiprocessor architecture for a reliable face recognition implementation 193
BNNsplit: Binarized Neural Networks for embedded distributed FPGA-based computing systems 193
A conceptual analysis framework for low power design of embedded systems 193
Towards the Acceleration of the Sparse Blossom Algorithm for Quantum Error Correction 192
Extensions of the hArtes Tool Chain 192
An Interrupt Controller for FPGA-based Multiprocessors 192
Reliability Properties Assessment at System Level: A Co-design Framework 191
HERA: Hardware evolution over reconfigurable architectures 191
Hardware DWT accelerator for MultiProcessor System On-Chip on FPGA 190
ReBit: A Tool to Manage and Analyse FPGA-Based Reconfigurable Systems 190
Analog circuits placement: A constraint driven methodology 190
Exploiting TLM and Object Introspection for System-Level Simulation 189
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems 189
Automated Fine-Grained CPU Provisioning for Virtual Machines 189
An Enhanced Relocation Manager to Speedup Core Allocation in FPGA-based Reconfigurable Systems 189
Metodo per la localizzazione di un dispositivo all'interno di un’area 189
Acknowledging Value of Personal Information: a Privacy Aware Data Market for Health and Social Research 189
An Architecture for Dynamically Reconfigurable Real Time Audio Processing Systems 188
Coloring the Cloud for Predictable Performance 188
Danger-system: Exploring new ways to manage occupants safety in smart building 188
Speeding-Up Expensive Evaluations in High-Level Synthesis Using Solution Modeling and Fitness Inheritance 188
EMPhASIS: An EMbedded Public Attention Stress Identification System 187
Ant Colony Optimization for Mapping and Scheduling in Heterogeneous Multiprocessor Systems 186
A High-Level Synthesis Flow for the Implementation of Iterative Stencil Loop Algorithms on FPGA Devices 186
On how to efficiently implement deep learning algorithms on PYNQ platform 186
An Instruction-Level Energy Model for Embedded VLIW Architectures 185
Internal and External Bitstream Relocation for Partial Dynamic Reconfiguration 184
Concurrency Emulation and Analysis of Parallel Applications for Multi-Processor System-on-Chip Co-Design 183
B2IRS: A Technique to Reduce BAN-BAN Interferences in Wireless Sensor Networks 183
SMASH: A Heuristic Methodology for Designing Partially Reconfigurable MPSoCs 183
Totale 21.249
Categoria #
all - tutte 202.257
article - articoli 43.630
book - libri 2.673
conference - conferenze 143.136
curatela - curatele 449
other - altro 0
patent - brevetti 2.020
selected - selezionate 0
volume - volumi 9.946
Totale 404.111


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20211.722 0 0 0 0 0 0 0 0 0 498 346 878
2021/20224.243 162 602 341 158 564 171 248 203 204 225 528 837
2022/20235.025 613 412 125 544 599 674 50 338 730 322 347 271
2023/20242.349 194 485 185 214 161 260 114 230 16 164 51 275
2024/20258.096 135 141 270 192 1.294 564 383 841 1.260 528 1.306 1.182
2025/202626.327 4.760 5.014 1.387 2.379 1.399 1.719 4.150 1.522 1.572 2.425 0 0
Totale 71.782