RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

SCIUTO, DONATELLA
 Distribuzione geografica
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Continente #
NA - Nord America 32.347
EU - Europa 15.736
AS - Asia 7.982
SA - Sud America 2.552
AF - Africa 361
OC - Oceania 45
Continente sconosciuto - Info sul continente non disponibili 18
Totale 59.041
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Nazione #
US - Stati Uniti d'America 31.733
RU - Federazione Russa 6.227
SG - Singapore 3.496
IT - Italia 2.456
BR - Brasile 2.252
CN - Cina 2.230
UA - Ucraina 1.274
VN - Vietnam 1.070
SE - Svezia 1.066
DE - Germania 970
GB - Regno Unito 780
FI - Finlandia 719
AT - Austria 617
CA - Canada 490
IE - Irlanda 390
FR - Francia 247
NL - Olanda 246
ES - Italia 242
IN - India 195
MA - Marocco 160
KR - Corea 144
CH - Svizzera 127
AR - Argentina 110
PL - Polonia 109
BD - Bangladesh 106
JO - Giordania 103
HK - Hong Kong 87
ID - Indonesia 81
TR - Turchia 81
BE - Belgio 74
IQ - Iraq 64
MX - Messico 55
JP - Giappone 53
ZA - Sudafrica 53
CI - Costa d'Avorio 52
EC - Ecuador 47
PK - Pakistan 39
UZ - Uzbekistan 31
AE - Emirati Arabi Uniti 30
GR - Grecia 30
PY - Paraguay 30
VE - Venezuela 30
AU - Australia 29
CO - Colombia 29
RO - Romania 28
SA - Arabia Saudita 25
CZ - Repubblica Ceca 19
AZ - Azerbaigian 18
PE - Perù 17
EU - Europa 16
CL - Cile 15
KE - Kenya 15
KG - Kirghizistan 14
UY - Uruguay 13
EG - Egitto 12
IL - Israele 12
JM - Giamaica 12
NP - Nepal 12
NZ - Nuova Zelanda 12
PT - Portogallo 12
TW - Taiwan 12
BJ - Benin 11
LT - Lituania 11
LU - Lussemburgo 11
DZ - Algeria 10
IR - Iran 10
KZ - Kazakistan 10
RS - Serbia 10
BO - Bolivia 9
CR - Costa Rica 9
DO - Repubblica Dominicana 9
EE - Estonia 9
PH - Filippine 9
AM - Armenia 8
HN - Honduras 8
OM - Oman 8
TN - Tunisia 8
AL - Albania 7
DK - Danimarca 7
LV - Lettonia 7
MU - Mauritius 7
NO - Norvegia 6
BG - Bulgaria 5
BY - Bielorussia 5
ET - Etiopia 5
LB - Libano 5
NI - Nicaragua 5
PA - Panama 5
SK - Slovacchia (Repubblica Slovacca) 5
TT - Trinidad e Tobago 5
BB - Barbados 4
MY - Malesia 4
SM - San Marino 4
SN - Senegal 4
AO - Angola 3
BH - Bahrain 3
BS - Bahamas 3
CY - Cipro 3
GE - Georgia 3
GH - Ghana 3
Totale 58.976
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Città #
Fairfield 4.281
Ashburn 3.286
Woodbridge 3.261
Houston 2.381
Chandler 2.145
Ann Arbor 1.825
Wilmington 1.825
Singapore 1.783
Seattle 1.742
Cambridge 1.454
Santa Clara 964
Moscow 873
Jacksonville 766
Beijing 651
Milan 634
Dearborn 601
Vienna 587
Boardman 563
Hefei 495
Council Bluffs 484
Lawrence 461
Dong Ket 419
Dublin 380
Ottawa 374
Medford 373
Los Angeles 281
San Diego 250
Des Moines 220
Helsinki 216
Málaga 209
Dallas 194
São Paulo 167
Buffalo 159
London 151
The Dalles 140
Casablanca 133
Ho Chi Minh City 133
New York 123
Bern 105
Amman 102
Amsterdam 102
Auburn Hills 100
Princeton 99
Seoul 96
Frankfurt am Main 95
Warsaw 80
Hanoi 79
Hong Kong 72
Rio de Janeiro 70
Brussels 68
Chicago 64
Rome 64
Jakarta 62
Kent 55
Redwood City 53
Washington 53
Columbus 51
Abidjan 50
Brasília 49
Mountain View 46
Istanbul 45
Shanghai 45
Curitiba 42
Belo Horizonte 41
Norwalk 41
Tokyo 38
Guangzhou 37
Phoenix 37
Brooklyn 36
Turku 36
Salvador 34
Atlanta 32
Düsseldorf 32
Munich 32
Redondo Beach 32
Campinas 31
Verona 31
Naples 29
Seongnam 29
Tashkent 27
Johannesburg 26
Montreal 26
Stockholm 25
Dhaka 24
Manaus 24
Tianjin 24
Guarulhos 23
Miami 23
Porto Alegre 23
San Francisco 23
Busto Arsizio 22
Baghdad 21
Florence 20
Goiânia 19
Mumbai 19
Santo André 19
Baie-D'Urfe 18
Indiana 18
Nanjing 18
Nuremberg 18
Totale 37.739
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Nome #
Tecnologie di recupero e separazione di terre rare: stato dell’arte e prospettive 409
Test Generation and Testability Alternatives Exploration of Critical Algorithms for Embedded Applications 292
Optimization strategies in design space exploration 282
Alfa Romeo technical office; Architettura della città; Casabella; Enios; House in Milan; Ina-casa programme; Nostra signora della misericordia; Palazzo bianco/Palazzo rosso; Rational architecture; Triennale di Milano; Velasca tower;Zentrum Paul Klee 269
A Design Kit for a Fully Working Shared Memory Multiprocessor on FPGA 254
A Performance-Aware Quality of Service-Driven Scheduler for Multicore Processors 231
Array partitioning: a methodology for reconfigurability and reconfiguration problems 227
An Evolutionary Approach to Area-Time Optimization of FPGA designs 226
A CMOS fault tolerant architecture for switch-level faults 208
Efficient Hardware Design of Iterative Stencil Loops 206
Adaptive and Flexible Smartphone Power Modeling 205
A Design Framework to Efficiently Explore Energy-Delay Tradeoffs 202
A Unified Approach to Canonical Form-based Boolean Matching 199
A Design Methodology for the Exploitation of High Level Communication Synthesis 199
A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs 198
D-RECS: A complete methodology to implement Self Dynamic Reconfigurable FPGA-based systems 198
Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering 194
Fitness Inheritance in Evolutionary and Multi-Objective High-Level Synthesis 193
HERA Project's Holistic Evolutionary Framework 192
A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture 191
A multiprocessor self-reconfigurable jpeg2000 encoder 190
A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis 186
Pushing the Level of Abstraction of Digital System Design: a Survey on How to Program FPGAs 182
K-Ways Partitioning of Polyhedral Process Networks: A Multi-level Approach 182
Reliability Properties Assessment at System Level: A Co-design Framework 181
An instruction-level methodology for power estimation and optimization of embedded VLIW cores 180
A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip 180
An Approach to Functional Testing of VLIW Architectures 180
Using Speculative Computation and Parallelizing Techniques to Improve Scheduling of Control based Designs 179
A design methodology to implement memory accesses in High-Level Synthesis 178
cODA: An Open-Source Framework to Easily Design Context-Aware Android Apps 178
A Compact Transactional Memory Multiprocessor System on FPGA 178
A System Level Approach in Designing Dual-Duplex Fault Tolerant Embedded Systems 178
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms 177
Faber: a Hardware/Software Toolchain for Image Registration 176
Mediation Grammar (CWA 18014:2023) - A testing methodology for measuring the empowerment of users of public services for migrants 176
On the Evolution of Hardware Circuits via Reconfigurable Architectures 176
Automatic parallelization of sequential specifications for symmetric MPSoCs 176
Lightweight DMA management mechanisms for multiprocessors on FPGA 174
A new switching-level approach to multiple-output functions synthesis 174
Model-Based Design for Wireless Body Sensor Network Nodes 173
A model of soft error effects in generic IP processors 172
A2B: an Integrated Framework for Designing Heterogeneous and Reconfigurable Systems 171
Analog circuits placement: A constraint driven methodology 171
On Self-adaptive Resource Allocation through Reinforcement Learning 171
The Case for Polymorphic Registers in Dataflow Computing 169
A Design Flow Tailored for Self Dynamic Reconfigurable Architecture 168
Towards a Performance-as-a-Service Cloud 168
FIDA: A framework to automatically integrate FPGA kernels within data-science applications 167
On the Design and Characterization of Set Packing Problem on Quantum Annealers 166
A Multi-Level Strategy for Software Power Estimation 166
Ant Colony Optimization for Mapping and Scheduling in Heterogeneous Multiprocessor Systems 166
Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems 166
Experimental evaluation and modeling of thermal phenomena on mobile devices 166
HLS Support for Polymorphic Parallel Memories 166
A Power-Efficient Methodology for Mapping Applications on Multi-Processor System-on-Chip Architectures 166
A Framework for the Functional Verification of SystemC Models 165
A Multi-objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis 164
TaBit: A framework for task graph to bitstream generation 164
A High-Level Synthesis Flow for the Implementation of Iterative Stencil Loop Algorithms on FPGA Devices 164
Reliable System Co-Design: the FIR Case Study 163
An Architecture for Dynamically Reconfigurable Real Time Audio Processing Systems 163
A dual-priority real-time multiprocessor system on FPGA for automotive applications 163
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems 163
A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops 163
MPower: towards an adaptive power management system for mobile devices 163
Tacit Consent: A Technique to Reduce Redundant Transmissions from Spatially Correlated Nodes in Wireless Sensor Networks 162
HERA: Hardware evolution over reconfigurable architectures 162
Hardware DWT accelerator for MultiProcessor System On-Chip on FPGA 161
SMASH: A Heuristic Methodology for Designing Partially Reconfigurable MPSoCs 161
An Enhanced Relocation Manager to Speedup Core Allocation in FPGA-based Reconfigurable Systems 160
A Scalable FPGA Design for Cloud N-Body Simulation 160
Automated Fine-Grained CPU Provisioning for Virtual Machines 159
ReBit: A Tool to Manage and Analyse FPGA-Based Reconfigurable Systems 159
OpenMPower: An Open and Accessible Database About Real World Mobile Devices 159
Concurrency Emulation and Analysis of Parallel Applications for Multi-Processor System-on-Chip Co-Design 158
Speeding-Up Expensive Evaluations in High-Level Synthesis Using Solution Modeling and Fitness Inheritance 158
The FASTER vision for designing dynamically reconfigurable systems 157
Morphone.OS: Context-awareness in everyday life 157
Danger-system: Exploring new ways to manage occupants safety in smart building 157
An Interrupt Controller for FPGA-based Multiprocessors 157
Exploiting TLM and Object Introspection for System-Level Simulation 156
B2IRS: A Technique to Reduce BAN-BAN Interferences in Wireless Sensor Networks 156
A Transform-Parametric Approach to Boolean Matching 155
ThermOS: System Support for Dynamic Thermal Management of Chip Multi-Processors 154
Coloring the Cloud for Predictable Performance 154
Extensions of the hArtes Tool Chain 154
Exploiting Data Forwarding to Reduce the Power Budget of VLIW Embedded Processors 153
MARC: A resource consumption modeling service for self-aware autonomous agents 153
A conceptual analysis framework for low power design of embedded systems 153
Factors Affecting ERP System Adoption: a Comparative Analysis between SMEs and Large Companies 152
Internal and External Bitstream Relocation for Partial Dynamic Reconfiguration 152
On how to efficiently implement deep learning algorithms on PYNQ platform 152
The Shining embedded system design methodology based on self dynamic reconfigurable architectures 152
On the development of a runtime reconfigurable multicore system-on-chip 151
Affinity-driven system design exploration for heterogeneous multiprocessor SoC 151
BlueSentinel: A first approach using iBeacon for an energy efficient occupancy detection system 151
A Caronte-oriented approach to a network-based educational infrastructure 150
An Instruction-Level Energy Model for Embedded VLIW Architectures 150
Evolutionary algorithms for the mapping of pipelined applications onto heterogeneous embedded systems 150
Totale 17.769
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Categoria #
all - tutte 180.226
article - articoli 38.744
book - libri 2.290
conference - conferenze 128.018
curatela - curatele 380
other - altro 0
patent - brevetti 1.702
selected - selezionate 0
volume - volumi 8.780
Totale 360.140
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20213.603 0 0 0 0 362 290 357 514 358 498 346 878
2021/20224.243 162 602 341 158 564 171 248 203 204 225 528 837
2022/20235.025 613 412 125 544 599 674 50 338 730 322 347 271
2023/20242.349 194 485 185 214 161 260 114 230 16 164 51 275
2024/20258.096 135 141 270 192 1.294 564 383 841 1.260 528 1.306 1.182
2025/202614.169 4.760 5.014 1.387 2.379 629 0 0 0 0 0 0 0
Totale 59.624