This paper proposes a system-level design methodology for the efficient exploration of the memory architecture from the energy-delay combined perspective. The aim is to find a sub-optimal configuration of the memory hierarchy without performing the exhaustive analysis of the parameters space

A Design Framework to Efficiently Explore Energy-Delay Tradeoffs

FORNACIARI, WILLIAM;SCIUTO, DONATELLA;SILVANO, CRISTINA;ZACCARIA, VITTORIO
2001-01-01

Abstract

This paper proposes a system-level design methodology for the efficient exploration of the memory architecture from the energy-delay combined perspective. The aim is to find a sub-optimal configuration of the memory hierarchy without performing the exhaustive analysis of the parameters space
Proceedings of CODES 2001: 9th ACM/IEEE International Symposium on Hardware/Software Co-Design
1-58113-364-2
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/258170
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