In this paper we present an FPGA-based reconfigurable architecture for real time elaboration of audio streams. The architecure allows to dynamically define chains of cascading filters through which sound streams can be elaborated. Since the architecture requires only one-dimensional device reconfigurability, it can be implemented even on low cost devices, such as Xilinx Spartan3. Moreover, prior to reconfiguring a filter, sound is rerouted in order to avoid stream interruptions. This makes the architecture particularly suited for real time elaboration, for instance in the field of live music performances, for adaptive filtering or for professional digital recording systems. We show the implementation of the proposed architecture on a Xilinx Virtex4 [1], [2] based board, and present an example based on a set of filters that are loaded in series in the chain.
An Architecture for Dynamically Reconfigurable Real Time Audio Processing Systems
BRUSCHI, FRANCESCO;RANA, VINCENZO;SCIUTO, DONATELLA
2008-01-01
Abstract
In this paper we present an FPGA-based reconfigurable architecture for real time elaboration of audio streams. The architecure allows to dynamically define chains of cascading filters through which sound streams can be elaborated. Since the architecture requires only one-dimensional device reconfigurability, it can be implemented even on low cost devices, such as Xilinx Spartan3. Moreover, prior to reconfiguring a filter, sound is rerouted in order to avoid stream interruptions. This makes the architecture particularly suited for real time elaboration, for instance in the field of live music performances, for adaptive filtering or for professional digital recording systems. We show the implementation of the proposed architecture on a Xilinx Virtex4 [1], [2] based board, and present an example based on a set of filters that are loaded in series in the chain.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.