RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

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Titolo Data di pubblicazione Autori File
A reconfiguration algorithm for delay minimization in VLSI/WSI array processors 1-gen-1987 SCIUTO, DONATELLA
On functional testing of array processors 1-gen-1988 SCIUTO, DONATELLA +
Array partitioning: a methodology for reconfigurability and reconfiguration problems 1-gen-1988 DISTANTE, FAUSTOSCIUTO, DONATELLA +
An Algorithm for Functional Reconfiguration of Fixed-Size Arrays 1-gen-1988 SCIUTO, DONATELLA +
Functional testing and verification of array systems 1-gen-1989 SCIUTO, DONATELLA +
Linear Testability Conditions for Two-Dimensional Arrays 1-gen-1989 SCIUTO, DONATELLA +
Testing of serial input convolvers 1-gen-1989 BREVEGLIERI, LUCA ODDONEDADDA, LUIGISCIUTO, DONATELLA
A comparative evaluation of bit-serial convolvers 1-gen-1989 BREVEGLIERI, LUCA ODDONEDADDA, LUIGISCIUTO, DONATELLA +
Testing approaches for flow graph derived FFTs arrays 1-gen-1989 ANTOLA, ANNA MARIASAMI, MARIAGIOVANNASCIUTO, DONATELLA
Linear and Constant Testability of Hexagonally Connected Arrays 1-gen-1989 SCIUTO, DONATELLA
Fault identification and fault location in algorithmic flow-driven WSI architectures 1-gen-1990 ANTOLA, ANNA MARIASAMI, MARIAGIOVANNASCIUTO, DONATELLA
A New Software Tool For Testability Analysis of Complex Vlsi Devices 1-gen-1990 SCIUTO, DONATELLA +
Constant Testability For Single Fault-detection In 2-dimensional Systolic Array Structures For Matrix Multiplication 1-gen-1990 SCIUTO, DONATELLA +
Testing of serial input convolvers 1-gen-1990 BREVEGLIERI, LUCA ODDONEDADDA, LUIGISCIUTO, DONATELLA
Guidelines For Testing Wsi Sequential Arrays 1-gen-1991 SCIUTO, DONATELLA +
Fast pipelined multipliers for bit-serial complex numbers 1-gen-1991 BREVEGLIERI, LUCA ODDONEPIURI, VINCENZOSCIUTO, DONATELLA
Architectures for edge extraction modules for the Hough transform 1-gen-1991 BREVEGLIERI, LUCA ODDONESCIUTO, DONATELLA +
Testing and Diagnosis of FFT Arrays 1-gen-1991 ANTOLA, ANNA MARIASAMI, MARIAGIOVANNASCIUTO, DONATELLA
Testability Conditions for Two-Dimensional Bilateral Arrays 1-gen-1991 SCIUTO, DONATELLA
Testing of Very Large Systems - A Hierarchical Approach To Fault Coverage Evaluation 1-gen-1991 DISTANTE, FAUSTOSAMI, MARIAGIOVANNASCIUTO, DONATELLA
Testability Conditions For Linear Sequential Arrays 1-gen-1991 SCIUTO, DONATELLA +
Design for testability techniques for CMOS combinational gates 1-gen-1991 SCIUTO, DONATELLA +
A Multilevel Testability Assistant For Vlsi Design 1-gen-1992 SCIUTO, DONATELLA +
Constant testability of combinational cellular tree structures 1-gen-1992 SCIUTO, DONATELLA +
Transistor Stuck-at and Delay Faults Detection In Static and Dynamic Cmos Combinational Gates 1-gen-1992 SCIUTO, DONATELLA +
A fast pipelined complex multiplier: the fault tolerance issue 1-gen-1992 BREVEGLIERI, LUCA ODDONEPIURI, VINCENZOSCIUTO, DONATELLA
Bit-serial fault-tolerant architectures for convolution and polynomial evaluation 1-gen-1992 BREVEGLIERI, LUCA ODDONEDADDA, LUIGISCIUTO, DONATELLA
Design Representation and Manipulation For High-level Synthesis of Dsp Algorithms 1-gen-1992 SCIUTO, DONATELLA +
Uncommitted Design of Digital Functions for Embedded Applications: State of the Art and Perspectives 1-gen-1993 FORNACIARI, WILLIAMSCIUTO, DONATELLA +
DOMINANCE BASED METHODOLOGIES FOR MULTIPLE-OUTPUT CMOS COMBINATIONAL GATES SYNTHESIS 1-gen-1993 SCIUTO, DONATELLASTEFANELLI, RENATO +
Functional Fault Models and Gate Level Coverage For Sequential Architectures 1-gen-1993 SCIUTO, DONATELLA +
Functional Testing and Constrained Synthesis of Sequential Architectures 1-gen-1993 SCIUTO, DONATELLA +
Reduction of fault detection costs through testable design of sequential architectures with signal feedbacks 1-gen-1993 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
System-Level Modeling of Control-Dominated Applications by Communicating Nets 1-gen-1993 FORNACIARI, WILLIAMSCIUTO, DONATELLA +
Two-Dimensional Sequential Array Architectures: Design for Testability and Reconfiguration Issues 1-gen-1993 BOLCHINI, CRISTIANASCIUTO, DONATELLA +
A Conceptual-Level Approach to Embedded System Design 1-gen-1993 FORNACIARI, WILLIAMSCIUTO, DONATELLA +
On the Minimal Test Set For Single Fault Location 1-gen-1993 SCIUTO, DONATELLA +
Fault Detection in TFCMOS/DFCMOS Combinational Gates 1-gen-1993 SCIUTO, DONATELLA +
CASTOR: an expert advisor for testability enhancement of VLSI systems 1-gen-1994 BOLCHINI, CRISTIANASCIUTO, DONATELLA +
Design for testability issues in the implementation of sequential array architectures 1-gen-1994 BOLCHINI, CRISTIANASCIUTO, DONATELLA +
A Methodology for Control-Dominated System Codesign 1-gen-1994 FORNACIARI, WILLIAMSCIUTO, DONATELLA +
The Role of Vhdl Within the Tosca Hardware - Software Codesign Framework 1-gen-1994 FORNACIARI, WILLIAMSCIUTO, DONATELLA +
CMOS Reliability Improvements Through a New Fault Tolerant Technique 1-gen-1994 BOLCHINI, CRISTIANASCIUTO, DONATELLA +
Hw/sw Codesign For Embedded Telecom Systems 1-gen-1994 FORNACIARI, WILLIAMSCIUTO, DONATELLA +
Introduzione ai sistemi informatici: architettura hardware e software 1-gen-1994 FORNACIARI, WILLIAMSCIUTO, DONATELLA +
A CMOS fault tolerant architecture for switch-level faults 1-gen-1994 BOLCHINI, CRISTIANASCIUTO, DONATELLA +
Behavioral Testability and Test Pattern Generation of the Hopfield Network Model 1-gen-1994 ALIPPI, CESARESAMI, MARIAGIOVANNASCIUTO, DONATELLA +
ALADIN: a multilevel testability analyzer for VLSI system design 1-gen-1994 FERRANDI, FABRIZIOSCIUTO, DONATELLA +
Innovative structures for CMOS combinational gates synthesis 1-gen-1994 SCIUTO, DONATELLA +
Constraint Generation and Placement for Automatic Layout Design of Analog Integrated Circuits 1-gen-1994 PILLAN, MARGHERITASCIUTO, DONATELLA
Mostrati risultati da 1 a 50 di 499
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