SAMI, MARIAGIOVANNA

SAMI, MARIAGIOVANNA  

DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA  

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Titolo Data di pubblicazione Autori File
A Compact and Fast Silicon Implementation for Layered Neural Nets 1-gen-1990 DISTANTE, FAUSTOSAMI, MARIAGIOVANNASTORTI GAJANI, GIANCARLO +
A configurable array architecture for WSI implementation of neural nets 1-gen-1990 DISTANTE, FAUSTOSAMI, MARIAGIOVANNASTORTI GAJANI, GIANCARLO +
A digital Architecture for Neural Networks 1-gen-1993 DISTANTE, FAUSTOSAMI, MARIAGIOVANNASTEFANELLI, RENATOSTORTI GAJANI, GIANCARLO
A digital front-end and readout microsystem for calorimetry at LHC 1-gen-1993 ALIPPI, CESAREBREVEGLIERI, LUCA ODDONEDADDA, LUIGIPIURI, VINCENZOSALICE, FABIOSAMI, MARIAGIOVANNASTEFANELLI, RENATO +
A general configurable architecture for WSI implementation for neural nets 1-gen-1990 DISTANTE, FAUSTOSAMI, MARIAGIOVANNASTORTI GAJANI, GIANCARLO
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems 1-gen-2003 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
A Proposal for Neural Macrocell Array 1-gen-1990 DISTANTE, FAUSTOSAMI, MARIAGIOVANNASTORTI GAJANI, GIANCARLO +
A semi-custom approach for digital implementation of neural networks 1-gen-1991 DISTANTE, FAUSTOSAMI, MARIAGIOVANNASTORTI GAJANI, GIANCARLO +
A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project 1-gen-2013 SAMI, MARIAGIOVANNA +
ADSC: Application-Driven Storage Control for Energy Efficiency 1-gen-2011 CAPPIELLO, CINZIAPERNICI, BARBARASAMI, MARIAGIOVANNA +
Alternative Approaches for Mapping Neural Networks onto Silicon 1-gen-1989 DISTANTE, FAUSTOSAMI, MARIAGIOVANNASTEFANELLI, RENATOSTORTI GAJANI, GIANCARLO
An Approach for Digital Neural Network Design 1-gen-1991 DISTANTE, FAUSTOSAMI, MARIAGIOVANNASTEFANELLI, RENATOSTORTI GAJANI, GIANCARLO
An Array Architecture for WSI Implementation of Neural Nets 1-gen-1990 DISTANTE, FAUSTOSAMI, MARIAGIOVANNASTEFANELLI, RENATOSTORTI GAJANI, GIANCARLO
An Instruction-Level Energy Model for Embedded VLIW Architectures 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
An instruction-level methodology for power estimation and optimization of embedded VLIW cores 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
Analyzing the Sensitivity to Faults of Synchronization Primitives 1-gen-2011 GRASSI, PAOLO ROBERTOSAMI, MARIAGIOVANNASPEZIALE, ETTORETARTARA, MICHELE
Area compaction in Silicon Structures for Neural Net Implementation 1-gen-1990 DISTANTE, FAUSTOSAMI, MARIAGIOVANNASTEFANELLI, RENATOSTORTI GAJANI, GIANCARLO
Arrays for digital signal processing functions: fault tolerance and functional reconfiguration 1-gen-1991 ANTOLA, ANNA MARIANEGRINI, ROBERTOSAMI, MARIAGIOVANNA +
Behavioral Testability and Test Pattern Generation of the Hopfield Network Model 1-gen-1994 ALIPPI, CESARESAMI, MARIAGIOVANNASCIUTO, DONATELLA +
Branch Prediction Techniques for Low-Power VLIW Processors 1-gen-2003 PALERMO, GIANLUCASAMI, MARIAGIOVANNASILVANO, CRISTINAZACCARIA, VITTORIO +