This paper presents an overview of a hardware/software codesign methodology and its supporting framework (TOSCA) with emphasis on the role played by the VHDL language. The proposed approach is tailored for control-oriented applications and aims at capturing the entire codesign flow, including system cospecification, high-level partitioning, hw/sw tradeoffs, cosynthesis and cosimulation. VHDL acts as the cornerstone in the task of evaluating the outputs of the codesign flow as well as linking them to commercial simulation and synthesis environments. In particular, the paper will address the issue of simulating hardware/software architectures, focusing on the application of VHDL to the definition of an easily retargetable CPU core model by exploiting the concept of virtual kernel and customizable input/output management scheme.
|Titolo:||The Role of Vhdl Within the Tosca Hardware - Software Codesign Framework|
|Data di pubblicazione:||1994|
|Appare nelle tipologie:||04.1 Contributo in Atti di convegno|
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