BOLCHINI, CRISTIANA

BOLCHINI, CRISTIANA  

DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA  

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Titolo Data di pubblicazione Autori File
A BDD based algorithm for detecting difficult faults 1-gen-1995 BOLCHINI, CRISTIANASALICE, FABIO +
A CMOS fault tolerant architecture for switch-level faults 1-gen-1994 BOLCHINI, CRISTIANASCIUTO, DONATELLA +
A context-aware methodology for very small data base design 1-gen-2004 BOLCHINI, CRISTIANASCHREIBER, FABIO ALBERTOTANCA, LETIZIA
A data mining approach to incremental adaptive functional diagnosis 1-gen-2013 BOLCHINI, CRISTIANAQUINTARELLI, ELISASALICE, FABIO +
A data-oriented survey of context models 1-gen-2007 BOLCHINI, CRISTIANAQUINTARELLI, ELISASCHREIBER, FABIO ALBERTOTANCA, LETIZIA +
A Data-Path Oriented, IP-Based Framework for flexible Design Exploration 1-gen-2006 BOLCHINI, CRISTIANABRANDOLESE, CARLOFORNACIARI, WILLIAMFRIGERIO, LAURASALICE, FABIO
A design methodology for the correct specification of VLSI systems 1-gen-1993 BOLCHINI, CRISTIANA +
A Methodology for a Very Small Data Base Design 1-gen-2007 BOLCHINI, CRISTIANASCHREIBER, FABIO ALBERTOTANCA, LETIZIA
A new switching-level approach to multiple-output functions synthesis 1-gen-1995 BOLCHINI, CRISTIANASCIUTO, DONATELLA +
A novel design methodology for implementingreliability-aware systems on SRAM-based FPGAs 1-gen-2011 BOLCHINI, CRISTIANAMIELE, ANTONIO ROSARIOSANDIONIGI, CHIARA
A novel methodology for designing TSC networks based on the parity bit code 1-gen-1997 BOLCHINI, CRISTIANASALICE, FABIOSCIUTO, DONATELLA
A reliability-aware partitioner for multi-FPGA platforms 1-gen-2011 BOLCHINI, CRISTIANASANDIONIGI, CHIARA
A scalar cost function for analyzing the quality of totally self-checking design methodologies 1-gen-1997 BOLCHINI, CRISTIANASALICE, FABIOSCIUTO, DONATELLA
A Software Methodology for detecting Hardware Faults in VLIW Data Paths 1-gen-2001 BOLCHINI, CRISTIANAPOMANTE, LUIGISALICE, FABIO
A Software Methodology for Detecting Hardware Faults in VLIW Data Paths 1-gen-2003 BOLCHINI, CRISTIANA
A state encoding for self-checking finite state machines 1-gen-1995 BOLCHINI, CRISTIANASALICE, FABIOSCIUTO, DONATELLA +
A synthesis methodology aimed at improving the quality of TSC devices 1-gen-1999 BOLCHINI, CRISTIANASALICE, FABIOSCIUTO, DONATELLA +
A System Level Approach in Designing Dual-Duplex Fault Tolerant Embedded Systems 1-gen-2002 BOLCHINI, CRISTIANAPOMANTE, LUIGISALICE, FABIOSCIUTO, DONATELLA
A TSC evaluation function for combinational circuits 1-gen-1997 BOLCHINI, CRISTIANASALICE, FABIOSCIUTO, DONATELLA
A Wafer Level Testability Approach Based on an Improved Scan Insertion Technique 1-gen-1995 BOLCHINI, CRISTIANAFERRANDI, FABRIZIOSCIUTO, DONATELLA +