RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

MANNOCCI, PIERGIULIO
 Distribuzione geografica
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Continente #
NA - Nord America 332
EU - Europa 272
AS - Asia 94
OC - Oceania 1
SA - Sud America 1
Totale 700
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Nazione #
US - Stati Uniti d'America 325
IT - Italia 154
SG - Singapore 27
FI - Finlandia 26
CN - Cina 22
IE - Irlanda 17
KR - Corea 17
DE - Germania 14
ES - Italia 14
FR - Francia 13
BE - Belgio 9
GB - Regno Unito 8
IN - India 8
CA - Canada 7
JO - Giordania 7
HK - Hong Kong 5
IL - Israele 3
LU - Lussemburgo 3
NL - Olanda 3
TW - Taiwan 3
UA - Ucraina 3
AT - Austria 2
CZ - Repubblica Ceca 2
SE - Svezia 2
AU - Australia 1
BR - Brasile 1
CH - Svizzera 1
JP - Giappone 1
RU - Federazione Russa 1
VN - Vietnam 1
Totale 700
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Città #
Chandler 71
Milan 37
Ashburn 35
Fairfield 25
Helsinki 22
Singapore 18
Dublin 17
San Diego 13
Wilmington 12
Málaga 11
Woodbridge 11
Cambridge 10
Seattle 10
Lawrence 9
Medford 9
Rome 9
Amman 7
Brescia 7
Cortenuova 7
Shanghai 6
Beijing 5
Pandino 5
Pohang 5
Seoul 5
Washington 5
Brussels 4
Houston 4
New York 4
Padova 4
Redmond 4
Sherbrooke 4
Amsterdam 3
Ann Arbor 3
Bologna 3
Bonndorf 3
Central District 3
Hesperange 3
Kraainem 3
Legnano 3
Avesta 2
Berlin 2
Bresso 2
Frosinone 2
Halle 2
Lappeenranta 2
Las Palmas de Gran Canaria 2
London 2
Montreal 2
New Bedfont 2
Norwalk 2
Paris 2
Parma 2
Pisa 2
Rovagnate 2
Taipei 2
Trento 2
Verdellino 2
Vienna 2
Vinnytsia 2
Aachen 1
Acton 1
Allentown 1
Americana 1
Atlanta 1
Bad Bellingen 1
Bergamo 1
Canberra 1
Catania 1
Central 1
Chicago 1
Dallas 1
Ferrara 1
Follonica 1
Frederick 1
Fremont 1
Grenoble 1
Gurgaon 1
Hsinchu 1
Kolkata 1
Kwai Chung 1
Lehigh Acres 1
Mangalore 1
Marseille 1
Modena 1
Moscow 1
Mountain View 1
Mumbai 1
Nes Ziyona 1
New Delhi 1
Nuremberg 1
Portland 1
Prescot 1
Queens 1
Redwood City 1
Richardson 1
San Vitaliano 1
Santa Barbara 1
Serravalle Scrivia 1
Soeul 1
Surat 1
Totale 500
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Nome #
A Universal, Analog, In-Memory Computing Primitive for Linear Algebra Using Memristors 173
Time Complexity of In-Memory Solution of Linear Systems 79
A Spiking Recurrent Neural Network with Phase Change Memory Synapses for Decision Making 65
A spiking recurrent neural network with phase change memory neurons and synapses for the accelerated solution of constraint satisfaction problems 46
Redundancy and Analog Slicing for Precise in-Memory Machine Learning--Part I: Programming Techniques 42
Status and challenges of in-memory computing for neural accelerators 39
Modeling and Compensation of IR Drop in Crosspoint Accelerators of Neural Networks 38
Redundancy and Analog Slicing for Precise In-Memory Machine Learning--Part II: Applications and Benchmark 37
Forming-Free Resistive Switching Memory Crosspoint Arrays for In-Memory Machine Learning 30
Experimental verification and benchmark of in-memory principal component analysis by crosspoint arrays of resistive switching memory 27
In-Memory Principal Component Analysis by Crosspoint Array of Resistive Switching Memory: A New Hardware Approach for Energy-Efficient Data Analysis in Edge Computing 27
An analogue in-memory ridge regression circuit with application to massive MIMO acceleration 25
In-memory computing with emerging memory devices: Status and outlook 20
A Generalized Block-Matrix Circuit for Closed-Loop Analog In-Memory Computing 17
Reservoir Computing with Charge-Trap Memory Based on a MoS2 Channel for Neuromorphic Engineering 16
Accelerating massive MIMO in 6G communications by analog in-memory computing circuits 15
Development of Crosspoint Memory Arrays for Neuromorphic Computing 9
Compact Modeling and Mitigation of Parasitics in Crosspoint Accelerators of Neural Networks 8
Closed-Loop In-Memory Computing for Energy-Efficient Matrix Eigendecomposition 7
In-Memory Principal Component Analysis by Analogue Closed-Loop Eigendecomposition 6
In-Memory Computing for Machine Learning and Deep Learning 6
In-memory neural network accelerator based on phase change memory (PCM) with one-selector/one-resistor (1S1R) structure operated in the subthreshold regime 5
An Ultrafast (< 200 ns) Sparse Solution Solver made by HfWOx/VOy Threshold Tunable Neurons 2
An SRAM-based reconfigurable analog in-memory computing circuit for solving linear algebra problems 2
Totale 741
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Categoria #
all - tutte 4.089
article - articoli 2.896
book - libri 0
conference - conferenze 1.159
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 34
Totale 8.178
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/20205 0 0 0 0 0 0 0 0 0 0 0 5
2020/202163 3 2 0 13 7 15 1 2 5 13 2 0
2021/2022217 2 7 9 7 116 14 8 6 12 8 15 13
2022/2023221 21 16 14 13 26 27 8 16 46 15 15 4
2023/2024226 13 26 9 20 19 19 7 16 11 41 17 28
2024/20259 3 6 0 0 0 0 0 0 0 0 0 0
Totale 741