Resistive random access memory (RRAM) devices offer a broad range of attractive properties for in-memory computing (IMC) applications, such as nonvolatile storage, low read current, and high scalability. IMC allows to overcome the memory bottleneck of data-intensive workloads, such as deep learning on the edge. In this context, 3-D vertical RRAM (3D-VRRAM) is a promising option to achieve high memory cell capacity with low fabrication cost. In this work, we present an HfOx-based 3D-VRRAM crossbar array (CBA) capable of IMC with precise multilevel programming. We show an extensive experimental demonstration of both matrix–vector multiplication (MVM) and inverse/pseudoinverse matrix calculation via IMC on 3D-VRRAM. To further support the parallel IMC application in real-life scenarios, the work also reports a demonstration of relatively large-size problems adopting 2D-RRAM and SRAM-based memory arrays. These results support 3D-VRRAM for high-density, energy-efficient IMC for edge computing applications.

3-D Vertical Resistive Switching Random Access Memory (3D-VRRAM) With Multilevel Programming for High-Density, Energy-Efficient In-Memory Computing

Bridarolli, D.;Mannocci, P.;Ricci, S.;Farronato, M.;Pedretti, G.;Sun, Z.;Ielmini, D.
2025-01-01

Abstract

Resistive random access memory (RRAM) devices offer a broad range of attractive properties for in-memory computing (IMC) applications, such as nonvolatile storage, low read current, and high scalability. IMC allows to overcome the memory bottleneck of data-intensive workloads, such as deep learning on the edge. In this context, 3-D vertical RRAM (3D-VRRAM) is a promising option to achieve high memory cell capacity with low fabrication cost. In this work, we present an HfOx-based 3D-VRRAM crossbar array (CBA) capable of IMC with precise multilevel programming. We show an extensive experimental demonstration of both matrix–vector multiplication (MVM) and inverse/pseudoinverse matrix calculation via IMC on 3D-VRRAM. To further support the parallel IMC application in real-life scenarios, the work also reports a demonstration of relatively large-size problems adopting 2D-RRAM and SRAM-based memory arrays. These results support 3D-VRRAM for high-density, energy-efficient IMC for edge computing applications.
2025
Edge computing
embedded memory
in-memory computing (IMC)
monolithic 3-D integration
resistive random access memory (RRAM)
scaling
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1290486
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