In-memory computing (IMC) can overcome the memory bottleneck of data-intensive workloads, such as deep learning on the edge. Scaling of IMC circuits is enabled by high-density crossbar arrays (CBAs) of 3D vertical resistive switching memory (VRRAM) in the back end of the line (BEOL). However, 3D-VRRAM capable of precise multilevel operation and accurate IMC has not been reported yet. This work demonstrates accurate IMC with multilevel 3D-VRRAM CBAs for both matrix-vector multiplication (MVM) and inverse/pseudoinverse matrix calculation for the first time. Energy-efficient, parallel IMC is demonstrated for real-life problems via experiments on multilevel 2D CBAs. These results support 3D-VRRAM for high-density, energy-efficient IMC in edge computing applications.

High-Density Multilevel 3D Vertical Resistive Switching Memory (VRRAM) for Massively Parallel in-Memory Computing

Bridarolli, D.;Zucchelli, C.;Mannocci, P.;Ricci, S.;Farronato, M.;Pedretti, G.;Sun, Z.;Ielmini, D.
2024-01-01

Abstract

In-memory computing (IMC) can overcome the memory bottleneck of data-intensive workloads, such as deep learning on the edge. Scaling of IMC circuits is enabled by high-density crossbar arrays (CBAs) of 3D vertical resistive switching memory (VRRAM) in the back end of the line (BEOL). However, 3D-VRRAM capable of precise multilevel operation and accurate IMC has not been reported yet. This work demonstrates accurate IMC with multilevel 3D-VRRAM CBAs for both matrix-vector multiplication (MVM) and inverse/pseudoinverse matrix calculation for the first time. Energy-efficient, parallel IMC is demonstrated for real-life problems via experiments on multilevel 2D CBAs. These results support 3D-VRRAM for high-density, energy-efficient IMC in edge computing applications.
2024
2024 IEEE International Electron Devices Meeting (IEDM)
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1283485
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