To reduce power consumption associated with data transmission and monitoring in next-generation wireless body sensor networks (WSBNs), compressive sensing (CS), a signal-processing technique for signal reconstruction from a limited number of measurements, was proposed. In CS, knowledge of the signal sparsity under some basis is used to cast the reconstruction problem as the solution of an ℓ1-penalized underdetermined linear system, a data-intensive task in energy-hungry conventional digital solvers. By eliminating the energy and latency overheads associated with continuous data shuttling between the memory and processing units, in-memory computing (IMC) may be a key enabler for highly energy-efficient next-generation WSBNs.Here, we show a novel closed-loop IMC (CL-IMC) circuit for signal reconstruction in the CS framework exploiting nonlinearities of analog operational amplifiers. We derive closed-form equations to describe the circuit operation and characterize its solution time and accuracy. We benchmark the circuit performance in electrocardiogram signal reconstruction against a floating-point 64-bit (FP64) digital solver, obtaining up to 1120 × energy consumption reduction. These results support the position of CL-IMC as a promising candidate for energy-efficient data processing in edge devices for biometric applications.

In-memory reconstruction of compressively-sampled signals by nonlinear closed-loop analog circuits

Mannocci, Piergiulio;Ielmini, Daniele
2025-01-01

Abstract

To reduce power consumption associated with data transmission and monitoring in next-generation wireless body sensor networks (WSBNs), compressive sensing (CS), a signal-processing technique for signal reconstruction from a limited number of measurements, was proposed. In CS, knowledge of the signal sparsity under some basis is used to cast the reconstruction problem as the solution of an ℓ1-penalized underdetermined linear system, a data-intensive task in energy-hungry conventional digital solvers. By eliminating the energy and latency overheads associated with continuous data shuttling between the memory and processing units, in-memory computing (IMC) may be a key enabler for highly energy-efficient next-generation WSBNs.Here, we show a novel closed-loop IMC (CL-IMC) circuit for signal reconstruction in the CS framework exploiting nonlinearities of analog operational amplifiers. We derive closed-form equations to describe the circuit operation and characterize its solution time and accuracy. We benchmark the circuit performance in electrocardiogram signal reconstruction against a floating-point 64-bit (FP64) digital solver, obtaining up to 1120 × energy consumption reduction. These results support the position of CL-IMC as a promising candidate for energy-efficient data processing in edge devices for biometric applications.
2025
2025 IEEE International Symposium on Circuits and Systems (ISCAS)
closed-loop computing
compressive sensing
In-memory computing
sparse recovery
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1298891
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