Phase change memory (PCM) offers high density and low current operation for energy efficient in-memory computing (IMC). However, conductance drift is still a major challenge affecting the accuracy of IMC-based edge artificial intelligence (AI) accelerators. This work presents a new weight mapping technique to linearly compensate drift, thus ensuring the linearity of matrix-vector multiplication (MVM). We show a new integrated circuit for MVM capable of current subtraction in the analog domain. High inference accuracy is demonstrated for mapped deep neural networks (DNNs) even after extensive annealing, thanks to differential mapping and optimization of read voltage Vread to mitigate drift-induced variations. These results support drift-compensated PCM as a robust technology for IMC-based edge AI inference.

Linear compensation of drift and mitigation of drift variations in PCM arrays for highly accurate, energy efficient in-memory computing

Bondì, D.;Giangrasso, S.;Panettieri, G.;Al Muktash, A.;Pistolesi, L.;Glukhov, A.;Cattaneo, L.;Lepri, N.;Mannocci, P.;Baldo, M.;Bonfanti, A.;Ielmini, D.
2025-01-01

Abstract

Phase change memory (PCM) offers high density and low current operation for energy efficient in-memory computing (IMC). However, conductance drift is still a major challenge affecting the accuracy of IMC-based edge artificial intelligence (AI) accelerators. This work presents a new weight mapping technique to linearly compensate drift, thus ensuring the linearity of matrix-vector multiplication (MVM). We show a new integrated circuit for MVM capable of current subtraction in the analog domain. High inference accuracy is demonstrated for mapped deep neural networks (DNNs) even after extensive annealing, thanks to differential mapping and optimization of read voltage Vread to mitigate drift-induced variations. These results support drift-compensated PCM as a robust technology for IMC-based edge AI inference.
2025
2025 IEEE International Electron Devices Meeting (IEDM),
Phase change materials;Weight measurement;Accuracy;Annealing;Voltage measurement;Prevention and mitigation;Energy efficiency;Distortion measurement;Electrical resistance measurement;Standards
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1305486
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