In-memory computing (IMC) is a non-von Neumann computing paradigm where highly specialized tasks are executed in parallel within memory arrays, thus benefiting the energy efficiency and the latency during data intensive workloads such as artificial intelligence (AI). Resistive random-access memory (RRAM) appears as one of the most promising devices for IMC, thanks to non-volatile multilevel storage, low cost and high scalability. A key enabler for RRAM technology is the 3D vertical architecture, which allows a significant increase of the memory array density with competitive fabrication cost. This work reports on the fabrication, characterization, programming and in-memory computing (IMC) in 4-layer 3D-Vertical RRAM (3D-VRRAM) arrays. The multilevel programming of 3D-VRRAM is reported with sub-2% precision in the final conductance after program/verify algorithm. The matrix vector multiplication (MVM) in a 4×4 3D-VRRAM array with error below 1 μA is reported for the first time.
3D vertical resistive random-access memory (3D-VRRAM) for analog in-memory computing
Bridarolli, D.;Carletti, F.;Ricci, S.;Porzani, M.;Mannocci, P.;Farronato, M.;Ielmini, D.
2025-01-01
Abstract
In-memory computing (IMC) is a non-von Neumann computing paradigm where highly specialized tasks are executed in parallel within memory arrays, thus benefiting the energy efficiency and the latency during data intensive workloads such as artificial intelligence (AI). Resistive random-access memory (RRAM) appears as one of the most promising devices for IMC, thanks to non-volatile multilevel storage, low cost and high scalability. A key enabler for RRAM technology is the 3D vertical architecture, which allows a significant increase of the memory array density with competitive fabrication cost. This work reports on the fabrication, characterization, programming and in-memory computing (IMC) in 4-layer 3D-Vertical RRAM (3D-VRRAM) arrays. The multilevel programming of 3D-VRRAM is reported with sub-2% precision in the final conductance after program/verify algorithm. The matrix vector multiplication (MVM) in a 4×4 3D-VRRAM array with error below 1 μA is reported for the first time.| File | Dimensione | Formato | |
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2025_nvmts.pdf
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