RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

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Titolo Data di pubblicazione Autori File
Instruction-Level Power Estimation for Embedded VLIW Cores 1-gen-2000 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
Power Reduction on VLIW Processors through Data Forwarding 1-gen-2000 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
Power Exploration for Embedded VLIW Architectures 1-gen-2000 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
Exploiting Data Forwarding to Reduce the Power Budget of VLIW Embedded Processors 1-gen-2001 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
A Power Modeling and Estimation Framework for VLIW-based Embedded Systems 1-gen-2001 SILVANO, CRISTINAZACCARIA, VITTORIO +
Fast System-Level Exploration of Memory Architectures Driven by Energy-Delay Metrics 1-gen-2001 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
An Agent-based Approach to Full Interoperability and Allocation Transparency in Distributed File Systems 1-gen-2001 FORNACIARI, WILLIAMPIURI, VINCENZOZACCARIA, VITTORIO +
A Design Framework to Efficiently Explore Energy-Delay Tradeoffs 1-gen-2001 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
Low-Power Data Forwarding for VLIW Embedded Architectures 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
An instruction-level methodology for power estimation and optimization of embedded VLIW cores 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
A Framework for Modeling and Estimating the Energy Dissipation of VLIW-based Embedded Systems 1-gen-2002 SILVANO, CRISTINAZACCARIA, VITTORIO +
Processor architecture with variable-stage pipeline 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems 1-gen-2002 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
An Instruction-Level Energy Model for Embedded VLIW Architectures 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
A System-Level Methodology for Fast Multi-Objective Design Space Exploration 1-gen-2003 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO +
About the performances of the advanced encryption standard in embedded systems with cache memory 1-gen-2003 BERTONI, GUIDO MARCOBREVEGLIERI, LUCA ODDONEFRAGNETO, PASQUALINAMACCHETTI, MARCOZACCARIA, VITTORIO +
A Flexible Framework for Fast Multi-Objective Design Space Exploration of Embedded Systems 1-gen-2003 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
Power Estimation and Optimization Methodologies for VLIW-Based Embedded Systems 1-gen-2003 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
Branch Prediction Techniques for Low-Power VLIW Processors 1-gen-2003 PALERMO, GIANLUCASAMI, MARIAGIOVANNASILVANO, CRISTINAZACCARIA, VITTORIO +
Power-Performance System-Level Exploration of a MicroSPARC2-based Embedded Architecture 1-gen-2003 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems 1-gen-2003 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip 1-gen-2004 ZACCARIA, VITTORIO +
Low Effort, High Accuracy Network-on-Chip Power Macro ModelingIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 1-gen-2004 ZACCARIA, VITTORIO +
Power-Aware Branch Prediction Techniques: A Compiler-Hints Based Approach for VLIW Processors 1-gen-2004 PALERMO, GIANLUCASAMI, MARIAGIOVANNASILVANO, CRISTINAZACCARIA, VITTORIO +
System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip 1-gen-2004 ZACCARIA, VITTORIO +
Processor Architecture 1-gen-2005 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
Multi-Objective Design Space Exploration of Embedded Systems 1-gen-2005 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
AES power attack based on induced cache miss and countermeasure 1-gen-2005 BERTONI, GUIDO MARCOBREVEGLIERI, LUCA ODDONEMONCHIERO, MATTEOPALERMO, GIANLUCAZACCARIA, VITTORIO
Reducing the complexity of instruction-level power models for VLIW processors 1-gen-2005 SILVANO, CRISTINASAMI, MARIAGIOVANNASCIUTO, DONATELLAZACCARIA, VITTORIO +
Low-Power Branch Prediction Techniques for VLIW Architectures: A Compiler-Hints Based Approach 1-gen-2005 PALERMO, GIANLUCASAMI, MARIAGIOVANNASILVANO, CRISTINAZACCARIA, VITTORIO +
A power attack methodology to AES based on induced cache misses: procedure, evaluation and possible countermeasures 1-gen-2006 BERTONI, GUIDO MARCOBREVEGLIERI, LUCA ODDONEMONCHIERO, MATTEOPALERMO, GIANLUCAZACCARIA, VITTORIO
Process for translating instructions for an arm-type processor into instructions for a LX-type processor; relative translator device and computer program product 1-gen-2007 ZACCARIA, VITTORIO +
An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO +
Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
Robust Optimization of SoC Architectures: A Multi-Scenario Approach 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques 1-gen-2009 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO +
Variability-Aware Robust Design Space Exploration of Chip Multiprocessor Architectures 1-gen-2009 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
ReSPIR: A Response Surface-Based Pareto Iterative Refinement for Application-Specific Design Space Exploration 1-gen-2009 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip 1-gen-2009 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO +
Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips 1-gen-2009 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO +
Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip 1-gen-2009 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO +
A Correlation-Based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip 1-gen-2010 PALERMO, GIANLUCAZACCARIA, VITTORIOSILVANO, CRISTINA +
Energy-Performance Design Space Exploration of SMT Architectures Exploiting Selective Load Value Predictions 1-gen-2010 PALERMO, GIANLUCAZACCARIA, VITTORIOSILVANO, CRISTINA +
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures 1-gen-2010 SILVANO, CRISTINAFORNACIARI, WILLIAMCRESPI REGHIZZI, STEFANOAGOSTA, GIOVANNIPALERMO, GIANLUCAZACCARIA, VITTORIOBELLASI, PATRICKCASTRO, FABRIZIOCORBETTA, SIMONEDI BIAGIO, ANDREASPEZIALE, ETTORETARTARA, MICHELE +
An industrial design space exploration framework for supporting run-time resource management on multi-core systems 1-gen-2010 ZACCARIA, VITTORIOPALERMO, GIANLUCASILVANO, CRISTINA +
MULTICUBE: Multi-objective design space exploration of multi-core architectures 1-gen-2010 SILVANO, CRISTINAFORNACIARI, WILLIAMPALERMO, GIANLUCAZACCARIA, VITTORIOCASTRO, FABRIZIO +
Multicube Explorer: An Open Source Framework for Design Space Exploration of Chip Multi-Processors 1-gen-2010 ZACCARIA, VITTORIOPALERMO, GIANLUCACASTRO, FABRIZIOSILVANO, CRISTINA +
Mostrati risultati da 1 a 50 di 101
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