PALERMO, GIANLUCA

PALERMO, GIANLUCA  

DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA  

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Titolo Data di pubblicazione Autori File
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures 1-gen-2010 SILVANO, CRISTINAFORNACIARI, WILLIAMCRESPI REGHIZZI, STEFANOAGOSTA, GIOVANNIPALERMO, GIANLUCAZACCARIA, VITTORIOBELLASI, PATRICKCASTRO, FABRIZIOCORBETTA, SIMONEDI BIAGIO, ANDREASPEZIALE, ETTORETARTARA, MICHELE +
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures. 1-gen-2011 SILVANO, CRISTINAFORNACIARI, WILLIAMCRESPI REGHIZZI, STEFANOAGOSTA, GIOVANNIPALERMO, GIANLUCAZACCARIA, VITTORIOBELLASI, PATRICKCORBETTA, SIMONEDI BIAGIO, ANDREASPEZIALE, ETTORETARTARA, MICHELE +
A Bayesian network approach for compiler auto-tuning for embedded processors 1-gen-2014 ASHOURI, AMIR HOSSEINMARIANI, GIOVANNI SIROPALERMO, GIANLUCASILVANO, CRISTINA
A Collaborative Filtering Approach for the Automatic Tuning of Compiler Optimisations 1-gen-2020 Cereda, StefanoPalermo, GianlucaCremonesi, Paolo +
A Compact Transactional Memory Multiprocessor System on FPGA 1-gen-2010 PALERMO, GIANLUCASCIUTO, DONATELLA +
A Configurable Monitoring Infrastructure for NoC-Based Architectures 1-gen-2014 PALERMO, GIANLUCASILVANO, CRISTINA +
A Correlation-Based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip 1-gen-2010 PALERMO, GIANLUCAZACCARIA, VITTORIOSILVANO, CRISTINA +
A Data Protection Unit for NoC-based Architectures 1-gen-2007 PALERMO, GIANLUCASILVANO, CRISTINA +
A Design Kit for a Fully Working Shared Memory Multiprocessor on FPGA 1-gen-2007 FERRANDI, FABRIZIOMONCHIERO, MATTEOPALERMO, GIANLUCASCIUTO, DONATELLATUMEO, ANTONINO
A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip 1-gen-2009 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO +
A dual-priority real-time multiprocessor system on FPGA for automotive applications 1-gen-2008 PALERMO, GIANLUCAFERRANDI, FABRIZIOSCIUTO, DONATELLA +
A Flexible Framework for Fast Multi-Objective Design Space Exploration of Embedded Systems 1-gen-2003 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
A framework for Compiler Level statistical analysis over customized VLIW architecture 1-gen-2013 ZACCARIA, VITTORIOPALERMO, GIANLUCASILVANO, CRISTINA +
A Meta-Model Assisted Coprocessor Synthesis Framework for Compiler/Architecture Parameters Customization 1-gen-2013 PALERMO, GIANLUCAZACCARIA, VITTORIOSILVANO, CRISTINA +
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level 1-gen-2008 MONCHIERO, MATTEOPALERMO, GIANLUCASILVANO, CRISTINAVILLA, ORESTE
A Monitoring System for NoCs 1-gen-2010 PALERMO, GIANLUCASILVANO, CRISTINA +
A multiprocessor self-reconfigurable jpeg2000 encoder 1-gen-2009 TUMEO, ANTONINOMONCHIERO, MATTEOPALERMO, GIANLUCAFERRANDI, FABRIZIOSCIUTO, DONATELLA +
A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs 1-gen-2007 FERRANDI, FABRIZIOMONCHIERO, MATTEOPALERMO, GIANLUCASCIUTO, DONATELLATUMEO, ANTONINO
A power attack methodology to AES based on induced cache misses: procedure, evaluation and possible countermeasures 1-gen-2006 BERTONI, GUIDO MARCOBREVEGLIERI, LUCA ODDONEMONCHIERO, MATTEOPALERMO, GIANLUCAZACCARIA, VITTORIO
A reconfigurable multiprocessor architecture for a reliable face recognition implementation 1-gen-2010 TUMEO, ANTONINOPALERMO, GIANLUCAFERRANDI, FABRIZIOSCIUTO, DONATELLA +