RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

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Mostrati risultati da 1 a 50 di 209
Titolo Data di pubblicazione Autori File
Architecture and design methodology of a 32-bit microprocessor 1-gen-1991 SILVANO, CRISTINA +
Ramgen: a dual port static RAM generator 1-gen-1992 SILVANO, CRISTINA +
GECO: A tool for automatic generation of error control codes for computer applications 1-gen-1995 SCIUTO, DONATELLASILVANO, CRISTINA +
VLSI design of systematic odd-weight-column byte error detecting SEC-DED codes 1-gen-1995 SCIUTO, DONATELLASILVANO, CRISTINA +
Construction Techniques for Systematic SEC-DED Codes with Single Byte Error Detection and Partial Correction Capability for Computer Memory Systems 1-gen-1995 SCIUTO, DONATELLASILVANO, CRISTINA +
A conceptual analysis framework for low power design of embedded systems 1-gen-1996 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA +
Digital information error correcting apparatus for single error correcting (SEC), double error detecting (DED), single byte error detecting (SBED), and odd numbered single byte error correcting (OSBEC) 1-gen-1996 SILVANO, CRISTINA
System-level power evaluation metrics 1-gen-1997 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA +
High-level power estimation of VLSI systems 1-gen-1997 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA +
A VHDL-based Approach for Power Estimation of Embedded Systems 1-gen-1997 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA +
Integrated CMOS static RAM 1-gen-1997 SILVANO, CRISTINA +
Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems 1-gen-1997 SCIUTO, DONATELLASILVANO, CRISTINA +
Power invariant vector compaction based on bit clustering and temporal partitioning 1-gen-1998 SILVANO, CRISTINA +
Integrierter CMOS-statischer RAM 1-gen-1998 SILVANO, CRISTINA +
Digital information error correcting apparatus for correcting single errors (SEC),detecting double errors(DED)and single byte multiple errors(SBD),and the correction of an odd number of single byte errors(ODD SBC) 1-gen-1998 SILVANO, CRISTINA
Address bus encoding techniques for system-level power optimization 1-gen-1998 SCIUTO, DONATELLASILVANO, CRISTINA +
Power Estimation of Embedded Systems: a Hardware/Software Co-design Approach 1-gen-1998 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA +
Digital information error correcting apparatus for correcting single errors (SEC),detecting double errors(DED)and single byte multiple errors(SBD),and the correction of an odd number of single byte errors(ODD SBC). 1-gen-1998 SILVANO, CRISTINA
Systematic AUED codes for self-checking architectures 1-gen-1998 SCIUTO, DONATELLASILVANO, CRISTINASTEFANELLI, RENATO
State encoding for low power embedded controllers 1-gen-1998 SCIUTO, DONATELLASILVANO, CRISTINA +
Automatic Generation of Error Control Codes for Computer Applications 1-gen-1998 SCIUTO, DONATELLASILVANO, CRISTINA +
Power estimation for architectural exploration of HW/SW communication on system-level buses 1-gen-1999 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA
Power estimation of system-level buses for microprocessor-based architectures: a case study 1-gen-1999 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA
RTL Power Embedded Estimation in a Industrial Design Flow 1-gen-1999 SILVANO, CRISTINA +
Influence of caching and encoding on power dissipation of system-level buses for embedded systems 1-gen-1999 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA
Power Exploration for Embedded VLIW Architectures 1-gen-2000 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
Power Reduction on VLIW Processors through Data Forwarding 1-gen-2000 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
Instruction-Level Power Estimation for Embedded VLIW Cores 1-gen-2000 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
Low-Power State Assignment Techniques for Finite State Machines 1-gen-2000 SCIUTO, DONATELLASILVANO, CRISTINA +
Power Optimization of System-Level Address Buses based on Software Profiling 1-gen-2000 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA +
Exploiting Data Forwarding to Reduce the Power Budget of VLIW Embedded Processors 1-gen-2001 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
A Power Modeling and Estimation Framework for VLIW-based Embedded Systems 1-gen-2001 SILVANO, CRISTINAZACCARIA, VITTORIO +
Fast System-Level Exploration of Memory Architectures Driven by Energy-Delay Metrics 1-gen-2001 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
Encoder architecture for parallel buses 1-gen-2001 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA +
Power Estimation of Embedded Systems: A Hardware/Software Codesign Approach 1-gen-2001 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA +
A Design Framework to Efficiently Explore Energy-Delay Tradeoffs 1-gen-2001 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
Low-Power Data Forwarding for VLIW Embedded Architectures 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
An instruction-level methodology for power estimation and optimization of embedded VLIW cores 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
A Framework for Modeling and Estimating the Energy Dissipation of VLIW-based Embedded Systems 1-gen-2002 SILVANO, CRISTINAZACCARIA, VITTORIO +
Processor architecture with variable-stage pipeline 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
Encoder/Decoder architecture and related processing system 1-gen-2002 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINA +
Progettazione digitale 1-gen-2002 FUMMI, FRANCOSAMI, MARIAGIOVANNASILVANO, CRISTINA
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems 1-gen-2002 FORNACIARI, WILLIAMSCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
An Instruction-Level Energy Model for Embedded VLIW Architectures 1-gen-2002 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems 1-gen-2003 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO +
Power-Performance System-Level Exploration of a MicroSPARC2-based Embedded Architecture 1-gen-2003 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
A System-Level Methodology for Fast Multi-Objective Design Space Exploration 1-gen-2003 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO +
Power Estimation and Optimization Methodologies for VLIW-Based Embedded Systems 1-gen-2003 SAMI, MARIAGIOVANNASCIUTO, DONATELLASILVANO, CRISTINAZACCARIA, VITTORIO
Branch Prediction Techniques for Low-Power VLIW Processors 1-gen-2003 PALERMO, GIANLUCASAMI, MARIAGIOVANNASILVANO, CRISTINAZACCARIA, VITTORIO +
Mostrati risultati da 1 a 50 di 209
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