Systematic AUED codes for self-checking architectures

Encoding techniques and dedicated self-checking architectures cart be conveniently adopted in VLSI design to increase fault detection. Area overhead and speed penalty may be traded-off with fault defection capabilities. Aim of this work is to define a class of systematic all-unidirectional error-detecting (AUED) codes suitable for self-checking architectures for multiple output combinational circuits. A class of systematic AUED codes is proposed along with a logic synthesis algorithm to derive the redundant functions directly from the primary inputs. If compared with Berger codes, the proposed encoding techniques require greater output redundancy but provide performance optimization in terms of both transition delays and area overhead.