RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

SILVANO, CRISTINA
 Distribuzione geografica
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Continente #
NA - Nord America 18.743
EU - Europa 8.379
AS - Asia 6.663
SA - Sud America 1.300
AF - Africa 239
Continente sconosciuto - Info sul continente non disponibili 211
OC - Oceania 40
Totale 35.575
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Nazione #
US - Stati Uniti d'America 18.347
RU - Federazione Russa 2.608
IT - Italia 2.434
CN - Cina 2.053
SG - Singapore 1.923
BR - Brasile 1.092
VN - Vietnam 1.029
UA - Ucraina 498
DE - Germania 464
SE - Svezia 458
KR - Corea 383
GB - Regno Unito 336
FR - Francia 329
FI - Finlandia 299
CA - Canada 262
JP - Giappone 257
IN - India 251
AT - Austria 219
HK - Hong Kong 218
ES - Italia 189
NL - Olanda 162
IE - Irlanda 157
MA - Marocco 117
BD - Bangladesh 83
AR - Argentina 79
MX - Messico 51
ID - Indonesia 50
IQ - Iraq 47
TH - Thailandia 46
BE - Belgio 44
PL - Polonia 44
TR - Turchia 44
ZA - Sudafrica 41
EC - Ecuador 39
AU - Australia 35
JO - Giordania 34
TW - Taiwan 34
CH - Svizzera 32
VE - Venezuela 30
PK - Pakistan 29
UZ - Uzbekistan 27
PH - Filippine 26
JM - Giamaica 21
SA - Arabia Saudita 21
CO - Colombia 20
CI - Costa d'Avorio 18
GR - Grecia 16
MY - Malesia 16
CR - Costa Rica 15
PY - Paraguay 15
AE - Emirati Arabi Uniti 13
AZ - Azerbaigian 12
CZ - Repubblica Ceca 12
KE - Kenya 12
NP - Nepal 12
AL - Albania 11
EG - Egitto 11
PE - Perù 10
CL - Cile 9
DZ - Algeria 9
IR - Iran 9
LT - Lituania 9
PT - Portogallo 9
RO - Romania 9
DO - Repubblica Dominicana 7
HN - Honduras 7
IL - Israele 7
MU - Mauritius 7
TN - Tunisia 7
BJ - Benin 6
EE - Estonia 6
EU - Europa 6
OM - Oman 6
TT - Trinidad e Tobago 6
BA - Bosnia-Erzegovina 5
HR - Croazia 5
LB - Libano 5
LV - Lettonia 5
NI - Nicaragua 5
ET - Etiopia 4
GT - Guatemala 4
LK - Sri Lanka 4
NZ - Nuova Zelanda 4
PA - Panama 4
BB - Barbados 3
BH - Bahrain 3
BO - Bolivia 3
CY - Cipro 3
HU - Ungheria 3
KG - Kirghizistan 3
NO - Norvegia 3
RS - Serbia 3
SV - El Salvador 3
SY - Repubblica araba siriana 3
UY - Uruguay 3
AM - Armenia 2
BN - Brunei Darussalam 2
BY - Bielorussia 2
DK - Danimarca 2
GA - Gabon 2
Totale 35.342
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Città #
Ashburn 2.621
Fairfield 2.057
Woodbridge 1.378
San Jose 1.243
Houston 1.032
Singapore 978
Seattle 915
Wilmington 814
Cambridge 756
Chandler 680
Ann Arbor 626
Milan 573
Council Bluffs 482
Moscow 363
Seoul 350
Beijing 349
Santa Clara 349
The Dalles 342
Boardman 302
Dallas 293
Jacksonville 292
Tokyo 246
Dearborn 245
Hefei 231
Vienna 205
Dong Ket 204
Lawrence 187
Lauterbourg 180
Hong Kong 177
Los Angeles 174
Medford 174
Hanoi 156
Ho Chi Minh City 154
Ottawa 154
Dublin 152
Málaga 149
Rome 143
North Charleston 142
Helsinki 107
New York 106
San Diego 100
São Paulo 95
Phoenix 92
Verona 90
Kenitra 87
Buffalo 80
London 75
Des Moines 73
Frankfurt am Main 68
Las Vegas 62
Shanghai 57
Naples 54
Amsterdam 52
New Delhi 46
Turin 44
Norwalk 42
Da Nang 41
Bologna 40
Atlanta 39
Rio de Janeiro 39
Brussels 38
Bangkok 37
Chicago 37
Guangzhou 36
Amman 34
Orem 34
Denver 32
Haiphong 32
Miami 32
Warsaw 32
Brescia 31
Brooklyn 31
Redwood City 30
Mumbai 26
Nuremberg 26
Taipei 25
Belo Horizonte 24
Jakarta 24
Tashkent 24
Delhi 23
Stockholm 23
Turku 23
Auburn Hills 22
Casablanca 22
Montreal 22
Chennai 21
Florence 21
Johannesburg 21
Mountain View 21
Princeton 21
Boston 20
Tianjin 20
Columbus 19
Düsseldorf 19
Indiana 19
Kent 18
Nanjing 18
Brasília 17
Catania 17
Munich 17
Totale 22.366
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Nome #
Progettazione digitale 1.031
Accelerating Binary and Mixed-Precision NNs Inference on STMicroelectronics Embedded NPU with Digital In-Memory-Computing 606
FactorFlow: Mapping GEMMs on Spatial Architectures through Adaptive Programming and Greedy Optimization 530
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level 330
EXSCALATE: An Extreme-Scale Virtual Screening Platform for Drug Discovery Targeting Polypharmacology to Fight SARS-CoV-2 305
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures 301
MiCOMP: Mitigating the Compiler Phase-Ordering Problem Using Optimization Sub-Sequences and Machine Learning 271
Exploiting OpenMP and OpenACC to accelerate a geometric approach to molecular docking in heterogeneous HPC nodes 266
SOCRATES - A seamless online compiler and system runtime autotuning framework for energy-aware applications 265
Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors 264
DeSpErate++: An enhanced design space exploration framework using predictive simulation scheduling 263
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures 262
A Design Framework to Efficiently Explore Energy-Delay Tradeoffs 261
mARGOt: a Dynamic Autotuning Framework for Self-aware Approximate Computing 256
A Data Protection Unit for NoC-based Architectures 255
Accelerating a Geometric Approach to Molecular Docking with OpenACC 255
A Flexible Framework for Fast Multi-Objective Design Space Exploration of Embedded Systems 246
A System-Level Methodology for Fast Multi-Objective Design Space Exploration 244
Efficiency and Scalability of Barrier Synchronization on NoC Based Many-core Architectures 243
A survey on compiler autotuning using machine learning 243
Low-power Architectures for Mobile Systems 242
An extreme-scale virtual screening platform for drug discovery 237
SPIRIT: Spectral-Aware Pareto Iterative Refinement Optimization for Supervised High-Level Synthesis 235
A Security Monitoring Service for NoCs 235
A Correlation-Based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip 234
LIGATE - LIgand Generator and portable drug discovery platform AT Exascale 231
An Efficient Synchronization Technique for Multiprocessor Systems on-Chip 231
OpenCL application auto-tuning and run-time resource management for multi-core platforms 222
A Bayesian network approach for compiler auto-tuning for embedded processors 221
ANTAREX - AutoTuning and adaptivity approach for energy efficient eXascale HPC systems 220
An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 219
Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach 219
Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering 218
A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip 217
An instruction-level methodology for power estimation and optimization of embedded VLIW cores 216
The ANTAREX approach to autotuning and adaptivity for energy efficient HPC Systems 216
An Efficient Monte Carlo-based Probabilistic Time-Dependent Routing Calculation Targeting a Server-Side Car Navigation System 216
Branch Prediction Techniques for Low-Power VLIW Processors 215
Customization of OpenCL Applications for Efficient Task Mapping Under Heterogeneous Platform Constraints 215
Combining application adaptivity and system-wide Resource Management on multi-core platforms 215
COBAYN: Compiler autotuning framework using Bayesian networks 212
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems 210
A conceptual analysis framework for low power design of embedded systems 210
Throughput balancing for energy efficient near-threshold manycores 209
An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods 206
Application autotuning to support runtime adaptivity in multicore architectures 206
Tunable approximations to control time-to-solution in an HPC molecular docking Mini-App 206
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems 203
Variability-Aware Robust Design Space Exploration of Chip Multiprocessor Architectures 202
A framework for Compiler Level statistical analysis over customized VLIW architecture 202
A Power-Efficient Methodology for Mapping Applications on Multi-Processor System-on-Chip Architectures 202
Data Parallel Application Adaptivity and System-Wide Resource Management in Many-Core Architectures 201
A Meta-Model Assisted Coprocessor Synthesis Framework for Compiler/Architecture Parameters Customization 201
Design Space Exploration Supporting Run-time Resource Management 199
Exploiting TLM and Object Introspection for System-Level Simulation 198
Parallel paradigms and run-time management techniques for many-core architectures: the 2parma approach 196
A Framework for Modeling and Estimating the Energy Dissipation of VLIW-based Embedded Systems 194
An Instruction-Level Energy Model for Embedded VLIW Architectures 193
An Hybrid Approach to accelerate a Molecular Docking Application for Virtual Screening in Heterogeneous Nodes 192
Design space pruning and computational workload splitting for autotuning OpenCL applications 191
The ANTAREX tool flow for monitoring and autotuning energy efficient HPC systems 190
Evaluating orthogonality between application auto-tuning and run-time resource management for adaptive OpenCL applications 186
Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures 185
A Variability-Aware Robust Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 185
Parallel paradigms and run-time management techniques for many-core architectures 185
The ANTAREX domain specific language for high performance computing 185
ARTE: An Application-specific Run-Time managEment framework for multi-cores based on queuing models 185
Mapping and Topology Customization Approaches for Application-Specific STNoC Designs 184
A Monitoring System for NoCs 184
A Power Modeling and Estimation Framework for VLIW-based Embedded Systems 182
MEPAD: A Memory-Efficient Parallelized Direct Convolution Algorithm for Deep Neural Networks 181
Decision-theoretic Exploration of Multi-Processor Platforms 181
A Configurable Monitoring Infrastructure for NoC-Based Architectures 180
Autotuning and adaptivity in energy efficient HPC systems: The ANTAREX toolbox 180
Tunable and Portable Extreme-Scale Drug Discovery Platform at Exascale: the LIGATE Approach 178
Exploiting Data Forwarding to Reduce the Power Budget of VLIW Embedded Processors 178
Workload- and process-variation aware voltage/frequency tuning for energy efficient performance sustainability of NTC manycores 178
Predictive modeling methodology for compiler phase-ordering 175
Automatic Tuning of Compilers Using Machine Learning 175
Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips 175
A Topology Design Customization Approach for STNoC 174
Linking run-time resource management of embedded multi-core platforms with automated design-time exploration 174
Improving Simulation Speed and Accuracy for Many-Core Embedded Platforms with Ensemble Models 172
Low-Power Data Forwarding for VLIW Embedded Architectures 170
Power/Performance Hardware Optimization for Synchronization Intensive Applications in MPSoCs 170
Design Space Exploration for Orlando Ultra Low-Power Convolutional Neural Network SoC 170
An Application Mapping Methodology and Case Study for Multi-Processor On-Chip Architectures 169
DSL and Autotuning Tools for Code Optimisation on HPC Inspired by Navigation Use Case 168
Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip 167
ARTE: an Application-specific Run-Time Management Framework for Multi-core Systems 167
A system-level exploration of power delivery architectures for near-threshold manycores considering performance constraints 166
Architecture Optimization of Application-Specific Implicit Instructions 165
A Tile-based Fused-layer CNN Accelerator for FPGAs 164
Fast System-Level Exploration of Memory Architectures Driven by Energy-Delay Metrics 163
Power Estimation and Optimization Methodologies for VLIW-Based Embedded Systems 163
State encoding for low power embedded controllers 163
Low-Power Branch Prediction Techniques for VLIW Architectures: A Compiler-Hints Based Approach 162
MULTICUBE: Multi-objective design space exploration of multi-core architectures 161
Design Space Exploration for Run-time Management of a Reconfigurable System for Video Streaming 160
Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems 160
Totale 22.164
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Categoria #
all - tutte 99.058
article - articoli 21.503
book - libri 2.923
conference - conferenze 62.073
curatela - curatele 3.208
other - altro 0
patent - brevetti 3.131
selected - selezionate 0
volume - volumi 6.220
Totale 198.116
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20221.483 0 0 158 125 231 109 91 102 86 102 176 303
2022/20231.949 240 102 49 253 185 243 20 121 281 209 132 114
2023/20241.348 102 209 72 192 95 154 63 123 22 109 54 153
2024/20253.569 54 79 128 115 492 213 219 406 516 242 530 575
2025/202614.043 2.083 2.087 695 1.040 782 754 2.151 735 1.176 1.338 318 884
2026/20271.493 310 393 790 0 0 0 0 0 0 0 0 0
Totale 35.575