SILVANO, CRISTINA
 Distribuzione geografica
Continente #
NA - Nord America 16.926
EU - Europa 7.649
AS - Asia 6.531
SA - Sud America 1.273
AF - Africa 239
OC - Oceania 36
Continente sconosciuto - Info sul continente non disponibili 6
Totale 32.660
Nazione #
US - Stati Uniti d'America 16.627
RU - Federazione Russa 2.608
CN - Cina 2.037
SG - Singapore 1.900
IT - Italia 1.740
BR - Brasile 1.082
VN - Vietnam 982
UA - Ucraina 498
DE - Germania 460
SE - Svezia 457
KR - Corea 383
GB - Regno Unito 328
FR - Francia 327
FI - Finlandia 299
JP - Giappone 256
IN - India 244
AT - Austria 219
CA - Canada 217
HK - Hong Kong 210
ES - Italia 186
NL - Olanda 160
IE - Irlanda 155
MA - Marocco 117
AR - Argentina 77
BD - Bangladesh 63
ID - Indonesia 50
IQ - Iraq 47
TH - Thailandia 46
MX - Messico 45
BE - Belgio 44
PL - Polonia 43
TR - Turchia 42
ZA - Sudafrica 41
EC - Ecuador 38
JO - Giordania 34
TW - Taiwan 33
AU - Australia 32
PK - Pakistan 29
CH - Svizzera 28
UZ - Uzbekistan 27
VE - Venezuela 27
PH - Filippine 24
SA - Arabia Saudita 19
CI - Costa d'Avorio 18
GR - Grecia 16
MY - Malesia 15
PY - Paraguay 15
AE - Emirati Arabi Uniti 13
AZ - Azerbaigian 12
CZ - Repubblica Ceca 12
KE - Kenya 12
NP - Nepal 12
AL - Albania 11
CO - Colombia 11
EG - Egitto 11
CL - Cile 9
DZ - Algeria 9
IR - Iran 9
LT - Lituania 9
CR - Costa Rica 8
PE - Perù 8
PT - Portogallo 8
RO - Romania 8
IL - Israele 7
JM - Giamaica 7
MU - Mauritius 7
TN - Tunisia 7
BJ - Benin 6
DO - Repubblica Dominicana 6
EU - Europa 6
OM - Oman 6
LB - Libano 5
LV - Lettonia 5
BA - Bosnia-Erzegovina 4
EE - Estonia 4
ET - Etiopia 4
HR - Croazia 4
NZ - Nuova Zelanda 4
PA - Panama 4
BH - Bahrain 3
BO - Bolivia 3
GT - Guatemala 3
HN - Honduras 3
KG - Kirghizistan 3
LK - Sri Lanka 3
NO - Norvegia 3
RS - Serbia 3
SY - Repubblica araba siriana 3
TT - Trinidad e Tobago 3
UY - Uruguay 3
AM - Armenia 2
BB - Barbados 2
BN - Brunei Darussalam 2
BY - Bielorussia 2
CY - Cipro 2
GA - Gabon 2
HU - Ungheria 2
KZ - Kazakistan 2
SN - Senegal 2
AO - Angola 1
Totale 32.645
Città #
Ashburn 2.385
Fairfield 2.057
Woodbridge 1.378
San Jose 1.039
Houston 1.016
Singapore 959
Seattle 907
Wilmington 811
Cambridge 756
Chandler 679
Ann Arbor 626
Milan 376
Moscow 363
Seoul 350
Beijing 343
The Dalles 341
Santa Clara 301
Jacksonville 289
Council Bluffs 274
Boardman 267
Dallas 262
Dearborn 245
Tokyo 245
Hefei 231
Vienna 205
Dong Ket 204
Lawrence 187
Lauterbourg 180
Medford 173
Hong Kong 169
Ottawa 153
Dublin 151
Los Angeles 151
Málaga 149
Ho Chi Minh City 143
Hanoi 140
North Charleston 140
Helsinki 107
San Diego 98
São Paulo 94
Kenitra 87
Verona 84
New York 79
Buffalo 76
London 75
Des Moines 72
Frankfurt am Main 67
Shanghai 57
Las Vegas 54
Amsterdam 52
New Delhi 45
Rome 43
Norwalk 42
Rio de Janeiro 39
Brussels 38
Bangkok 37
Da Nang 37
Guangzhou 36
Amman 34
Orem 33
Warsaw 32
Redwood City 30
Denver 29
Haiphong 28
Chicago 27
Naples 26
Nuremberg 26
Miami 25
Taipei 25
Belo Horizonte 24
Jakarta 24
Mumbai 24
Phoenix 24
Tashkent 24
Delhi 23
Turku 23
Auburn Hills 22
Casablanca 22
Stockholm 22
Turin 22
Atlanta 21
Bologna 21
Brooklyn 21
Chennai 21
Johannesburg 21
Montreal 21
Mountain View 21
Brescia 20
Tianjin 20
Düsseldorf 19
Indiana 19
Princeton 19
Kent 18
Munich 17
Nanjing 17
Porto Alegre 17
Abidjan 16
Brasília 16
Columbus 16
Dhaka 16
Totale 20.910
Nome #
Progettazione digitale 976
Accelerating Binary and Mixed-Precision NNs Inference on STMicroelectronics Embedded NPU with Digital In-Memory-Computing 565
FactorFlow: Mapping GEMMs on Spatial Architectures through Adaptive Programming and Greedy Optimization 511
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level 322
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures 286
EXSCALATE: An Extreme-Scale Virtual Screening Platform for Drug Discovery Targeting Polypharmacology to Fight SARS-CoV-2 267
A Design Framework to Efficiently Explore Energy-Delay Tradeoffs 250
Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors 250
A Data Protection Unit for NoC-based Architectures 244
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures 242
DeSpErate++: An enhanced design space exploration framework using predictive simulation scheduling 241
Exploiting OpenMP and OpenACC to accelerate a geometric approach to molecular docking in heterogeneous HPC nodes 240
Accelerating a Geometric Approach to Molecular Docking with OpenACC 237
A System-Level Methodology for Fast Multi-Objective Design Space Exploration 236
A Flexible Framework for Fast Multi-Objective Design Space Exploration of Embedded Systems 233
mARGOt: a Dynamic Autotuning Framework for Self-aware Approximate Computing 232
Low-power Architectures for Mobile Systems 231
MiCOMP: Mitigating the Compiler Phase-Ordering Problem Using Optimization Sub-Sequences and Machine Learning 230
SPIRIT: Spectral-Aware Pareto Iterative Refinement Optimization for Supervised High-Level Synthesis 226
A Correlation-Based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip 226
Efficiency and Scalability of Barrier Synchronization on NoC Based Many-core Architectures 224
A Security Monitoring Service for NoCs 217
An Efficient Synchronization Technique for Multiprocessor Systems on-Chip 216
SOCRATES - A seamless online compiler and system runtime autotuning framework for energy-aware applications 214
Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering 213
A Bayesian network approach for compiler auto-tuning for embedded processors 212
An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 211
Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach 209
OpenCL application auto-tuning and run-time resource management for multi-core platforms 208
The ANTAREX approach to autotuning and adaptivity for energy efficient HPC Systems 207
Combining application adaptivity and system-wide Resource Management on multi-core platforms 207
A survey on compiler autotuning using machine learning 206
Branch Prediction Techniques for Low-Power VLIW Processors 205
A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip 205
ANTAREX - AutoTuning and adaptivity approach for energy efficient eXascale HPC systems 204
An instruction-level methodology for power estimation and optimization of embedded VLIW cores 202
COBAYN: Compiler autotuning framework using Bayesian networks 201
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems 201
Customization of OpenCL Applications for Efficient Task Mapping Under Heterogeneous Platform Constraints 200
An Efficient Monte Carlo-based Probabilistic Time-Dependent Routing Calculation Targeting a Server-Side Car Navigation System 199
An extreme-scale virtual screening platform for drug discovery 197
LIGATE - LIgand Generator and portable drug discovery platform AT Exascale 196
An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods 196
A framework for Compiler Level statistical analysis over customized VLIW architecture 194
A Power-Efficient Methodology for Mapping Applications on Multi-Processor System-on-Chip Architectures 194
Parallel paradigms and run-time management techniques for many-core architectures: the 2parma approach 193
Application autotuning to support runtime adaptivity in multicore architectures 193
A conceptual analysis framework for low power design of embedded systems 193
Throughput balancing for energy efficient near-threshold manycores 192
A Meta-Model Assisted Coprocessor Synthesis Framework for Compiler/Architecture Parameters Customization 192
Design Space Exploration Supporting Run-time Resource Management 192
Data Parallel Application Adaptivity and System-Wide Resource Management in Many-Core Architectures 190
Exploiting TLM and Object Introspection for System-Level Simulation 189
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems 189
Tunable approximations to control time-to-solution in an HPC molecular docking Mini-App 189
Variability-Aware Robust Design Space Exploration of Chip Multiprocessor Architectures 187
A Framework for Modeling and Estimating the Energy Dissipation of VLIW-based Embedded Systems 186
An Instruction-Level Energy Model for Embedded VLIW Architectures 185
A Variability-Aware Robust Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 180
Parallel paradigms and run-time management techniques for many-core architectures 178
Evaluating orthogonality between application auto-tuning and run-time resource management for adaptive OpenCL applications 178
Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures 177
A Monitoring System for NoCs 176
Mapping and Topology Customization Approaches for Application-Specific STNoC Designs 175
ARTE: An Application-specific Run-Time managEment framework for multi-cores based on queuing models 174
A Configurable Monitoring Infrastructure for NoC-Based Architectures 172
Autotuning and adaptivity in energy efficient HPC systems: The ANTAREX toolbox 172
Decision-theoretic Exploration of Multi-Processor Platforms 171
Predictive modeling methodology for compiler phase-ordering 170
A Power Modeling and Estimation Framework for VLIW-based Embedded Systems 169
Linking run-time resource management of embedded multi-core platforms with automated design-time exploration 169
Exploiting Data Forwarding to Reduce the Power Budget of VLIW Embedded Processors 168
The ANTAREX tool flow for monitoring and autotuning energy efficient HPC systems 168
Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips 168
Improving Simulation Speed and Accuracy for Many-Core Embedded Platforms with Ensemble Models 165
An Hybrid Approach to accelerate a Molecular Docking Application for Virtual Screening in Heterogeneous Nodes 165
Power/Performance Hardware Optimization for Synchronization Intensive Applications in MPSoCs 163
Design Space Exploration for Orlando Ultra Low-Power Convolutional Neural Network SoC 163
Design space pruning and computational workload splitting for autotuning OpenCL applications 163
MEPAD: A Memory-Efficient Parallelized Direct Convolution Algorithm for Deep Neural Networks 162
A Topology Design Customization Approach for STNoC 162
An Application Mapping Methodology and Case Study for Multi-Processor On-Chip Architectures 162
The ANTAREX domain specific language for high performance computing 162
Workload- and process-variation aware voltage/frequency tuning for energy efficient performance sustainability of NTC manycores 162
Architecture Optimization of Application-Specific Implicit Instructions 160
ARTE: an Application-specific Run-Time Management Framework for Multi-core Systems 159
Automatic Tuning of Compilers Using Machine Learning 159
Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip 158
A system-level exploration of power delivery architectures for near-threshold manycores considering performance constraints 158
Tunable and Portable Extreme-Scale Drug Discovery Platform at Exascale: the LIGATE Approach 157
Fast System-Level Exploration of Memory Architectures Driven by Energy-Delay Metrics 156
Low-Power Data Forwarding for VLIW Embedded Architectures 154
Construction Techniques for Systematic SEC-DED Codes with Single Byte Error Detection and Partial Correction Capability for Computer Memory Systems 154
Power Estimation and Optimization Methodologies for VLIW-Based Embedded Systems 153
Design Space Exploration for Run-time Management of a Reconfigurable System for Video Streaming 151
DSL and Autotuning Tools for Code Optimisation on HPC Inspired by Navigation Use Case 151
MULTICUBE: Multi-objective design space exploration of multi-core architectures 150
State encoding for low power embedded controllers 150
Plug-in of Power Models in the StepNP Exploration Platform: Analysis of Power/Performance Trade-offs 148
DeSpErate: Speeding-up design space exploration by using predictive simulation scheduling 148
Totale 20.713
Categoria #
all - tutte 88.162
article - articoli 19.023
book - libri 2.662
conference - conferenze 55.433
curatela - curatele 2.783
other - altro 0
patent - brevetti 2.662
selected - selezionate 0
volume - volumi 5.599
Totale 176.324


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20211.000 0 0 0 0 0 0 0 0 0 359 171 470
2021/20221.784 77 224 158 125 231 109 91 102 86 102 176 303
2022/20231.949 240 102 49 253 185 243 20 121 281 209 132 114
2023/20241.348 102 209 72 192 95 154 63 123 22 109 54 153
2024/20253.569 54 79 128 115 492 213 219 406 516 242 530 575
2025/202612.825 2.083 2.087 695 1.040 782 754 2.151 735 1.176 1.322 0 0
Totale 32.864