CHERNIAK, DMYTRO
CHERNIAK, DMYTRO
DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA
A 10-GHz Digital-PLL-Based Chirp Generator With Parabolic Non-Uniform Digital Predistortion for FMCW Radars
2024-01-01 Tesolin, Francesco; Dartizio, Simone M.; Castoro, Giacomo; Buccoleri, Francesco; Rossoni, Michele; Cherniak, Dmytro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
A 23-GHz Low-Phase-Noise Digital Bang-Bang PLL for Fast Triangular and Sawtooth Chirp Modulation
2018-01-01 Cherniak, Dmytro; Grimaldi, Luigi; Bertulessi, Luca; Nonis, Roberto; Samori, Carlo; Levantino, Salvatore
A 30-GHz Digital Sub-Sampling Fractional-N PLL With -238.6-dB Jitter-Power Figure of Merit in 65-nm LP CMOS
2019-01-01 Bertulessi, Luca; Karman, Saleh; Cherniak, Dmytro; Garghetti, Alessandro; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner
2023-01-01 Buccoleri, F; Dartizio, Sm; Tesolin, F; Avallone, L; Santiccioli, A; Iesurum, A; Steffan, G; Cherniak, D; Bertulessi, L; Bevilacqua, A; Samori, C; Lacaita, Al; Levantino, S
A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking-Time
2022-01-01 Dartizio, Simone M.; Buccoleri, Francesco; Tesolin, Francesco; Avallone, Luca; Santiccioli, Alessio; Iesurum, Agata; Steffan, Giovanni; Cherniak, Dmytro; Bertulessi, Luca; Bevilacqua, Andrea; Samori, Carlo; Lacaita, Andrea L.; Levantino, Salvatore
A Low-Spur and Low-Jitter Fractional-N Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering
2023-01-01 Dartizio, Sm; Tesolin, F; Castoro, G; Buccoleri, F; Rossoni, M; Cherniak, D; Samori, C; Lacaita, Al; Levantino, S
PLL-Based Wideband Frequency Modulator: Two-Point Injection Versus Pre-Emphasis Technique
2017-01-01 Cherniak, Dmytro; Samori, Carlo; Nonis, Roberto; Levantino, Salvatore