RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

SALICE, FABIO

SALICE, FABIO  

DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA  

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Risultati 1 - 20 di 158 (tempo di esecuzione: 0.041 secondi).
Titolo Data di pubblicazione Autori File
A BDD based algorithm for detecting difficult faults 1-gen-1995 BOLCHINI, CRISTIANASALICE, FABIO +
A Case Study in Co-Design: Reengineering an Industrial Device 1-gen-1998 FORNACIARI, WILLIAMSALICE, FABIO +
A Constraint Generation Tool for the Design of High Frequency Integrated Cirsuits 1-gen-1996 PILLAN, MARGHERITASALICE, FABIO +
A data mining approach to incremental adaptive functional diagnosis 1-gen-2013 BOLCHINI, CRISTIANAQUINTARELLI, ELISASALICE, FABIO +
A Data-Path Oriented, IP-Based Framework for flexible Design Exploration 1-gen-2006 BOLCHINI, CRISTIANABRANDOLESE, CARLOFORNACIARI, WILLIAMFRIGERIO, LAURASALICE, FABIO
A digital front-end and readout microsystem for calorimetry at LHC 1-gen-1993 ALIPPI, CESAREBREVEGLIERI, LUCA ODDONEDADDA, LUIGIPIURI, VINCENZOSALICE, FABIOSAMI, MARIAGIOVANNASTEFANELLI, RENATO +
A General Criterion for Cost-driven realization of Digital ANNs 1-gen-1995 FORNACIARI, WILLIAMSALICE, FABIO +
A Generalized Approach for the Use of Convolutional Coding in SEU Mitigation 1-gen-2008 FRIGERIO, LAURASALICE, FABIO +
A Hand Gesture Interface Using Hand Shapes and Dynamic Hand Movement: the Home Control Case 1-gen-2014 SAIDINEJAD, HASSANCOMAI, SARASALICE, FABIO
A novel methodology for designing TSC networks based on the parity bit code 1-gen-1997 BOLCHINI, CRISTIANASALICE, FABIOSCIUTO, DONATELLA
A Performance-Oriented Hardware/Software Partitioning for Datapath Applications 1-gen-2008 FRIGERIO, LAURASALICE, FABIO
A scalar cost function for analyzing the quality of totally self-checking design methodologies 1-gen-1997 BOLCHINI, CRISTIANASALICE, FABIOSCIUTO, DONATELLA
A SoC-Based Methodology for Cycle-Accurate RTOS System Call Timing Characterization 1-gen-2005 BRANDOLESE, CARLOFORNACIARI, WILLIAMSALICE, FABIO
A Software Methodology for detecting Hardware Faults in VLIW Data Paths 1-gen-2001 BOLCHINI, CRISTIANAPOMANTE, LUIGISALICE, FABIO
A state encoding for self-checking finite state machines 1-gen-1995 BOLCHINI, CRISTIANASALICE, FABIOSCIUTO, DONATELLA +
A Structured Approach for Automatic Design of PN-based Digital Neural Netwoks 1-gen-1992 FORNACIARI, WILLIAMSALICE, FABIO
A synthesis methodology aimed at improving the quality of TSC devices 1-gen-1999 BOLCHINI, CRISTIANASALICE, FABIOSCIUTO, DONATELLA +
A System Level Approach in Designing Dual-Duplex Fault Tolerant Embedded Systems 1-gen-2002 BOLCHINI, CRISTIANAPOMANTE, LUIGISALICE, FABIOSCIUTO, DONATELLA
A Template-Based Strategy for Mapping System Level Specification onto VHDL Hardware Modules September 6-11, 1998. pp. 139-146. 1-gen-1998 FORNACIARI, WILLIAMSALICE, FABIOSCIUTO, DONATELLA +
A TSC evaluation function for combinational circuits 1-gen-1997 BOLCHINI, CRISTIANASALICE, FABIOSCIUTO, DONATELLA