SALICE, FABIO

SALICE, FABIO  

DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA  

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Titolo Data di pubblicazione Autori File
A BDD based algorithm for detecting difficult faults 1-gen-1995 BOLCHINI, CRISTIANASALICE, FABIO +
A Case Study in Co-Design: Reengineering an Industrial Device 1-gen-1998 FORNACIARI, WILLIAMSALICE, FABIO +
A Constraint Generation Tool for the Design of High Frequency Integrated Cirsuits 1-gen-1996 PILLAN, MARGHERITASALICE, FABIO +
A data mining approach to incremental adaptive functional diagnosis 1-gen-2013 BOLCHINI, CRISTIANAQUINTARELLI, ELISASALICE, FABIO +
A Data-Path Oriented, IP-Based Framework for flexible Design Exploration 1-gen-2006 BOLCHINI, CRISTIANABRANDOLESE, CARLOFORNACIARI, WILLIAMFRIGERIO, LAURASALICE, FABIO
A Deterministic Constraint Driven Placement methodology for Analog Circuits 1-gen-1995 BRANDOLESE, CARLOPILLAN, MARGHERITASALICE, FABIOSCIUTO, DONATELLA
A First Step Towards Hw/Sw Partitioning of UML Specifications 1-gen-2003 FORNACIARI, WILLIAMSALICE, FABIO +
A flexible model for evaluating the behavior of hardware/software systems 1-gen-1997 FORNACIARI, WILLIAMSALICE, FABIOSCIUTO, DONATELLA +
A Formal Condition to Stop an Incremental Automatic Functional Diagnosis 1-gen-2010 BOLCHINI, CRISTIANASALICE, FABIOAMATI, LUCA +
A formal methodology for automatic synthesis of Neural Nets 1-gen-1991 STORTI GAJANI, GIANCARLOFORNACIARI, WILLIAMSALICE, FABIO
A General Criterion for Cost-driven realization of Digital ANNs 1-gen-1995 FORNACIARI, WILLIAMSALICE, FABIO +
A Generalized Approach for the Use of Convolutional Coding in SEU Mitigation 1-gen-2008 FRIGERIO, LAURASALICE, FABIO +
A Hand Gesture Interface Using Hand Shapes and Dynamic Hand Movement: the Home Control Case 1-gen-2014 SAIDINEJAD, HASSANCOMAI, SARASALICE, FABIO
A Low Latency Digital Neural Network Architecture 1-gen-1992 FORNACIARI, WILLIAMSALICE, FABIO
A model for system-level timed analysis and profiling 1-gen-1998 FORNACIARI, WILLIAMSALICE, FABIOSCIUTO, DONATELLA +
A model of soft error effects in generic IP processors 1-gen-2005 BOLCHINI, CRISTIANAMIELE, ANTONIO ROSARIOSALICE, FABIOSCIUTO, DONATELLA
A Multi-Level Strategy for Software Power Estimation 1-gen-2000 BRANDOLESE, CARLOFORNACIARI, WILLIAMSALICE, FABIOSCIUTO, DONATELLA +
A New Framework for Design and Simulation of Complex Hardware/Software Systems 1-gen-2007 BRANDOLESE, CARLOFRIGERIO, LAURASALICE, FABIO +
A novel methodology for designing TSC networks based on the parity bit code 1-gen-1997 BOLCHINI, CRISTIANASALICE, FABIOSCIUTO, DONATELLA
A Performance-Oriented Hardware/Software Partitioning for Datapath Applications 1-gen-2008 FRIGERIO, LAURASALICE, FABIO