MANNOCCI, PIERGIULIO
MANNOCCI, PIERGIULIO
DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA
3-D Vertical Resistive Switching Random Access Memory (3D-VRRAM) With Multilevel Programming for High-Density, Energy-Efficient In-Memory Computing
2025-01-01 Bridarolli, D.; Zucchelli, C.; Mannocci, P.; Ricci, S.; Farronato, M.; Pedretti, G.; Sun, Z.; Ielmini, D.
3D vertical resistive random-access memory (3D-VRRAM) for analog in-memory computing
2025-01-01 Bridarolli, D.; Carletti, F.; Ricci, S.; Porzani, M.; Mannocci, P.; Farronato, M.; Ielmini, D.
A fully integrated analogue closed-loop in-memory computing accelerator based on static random-access memory
2026-01-01 Mannocci, Piergiulio; Zucchelli, Carlo; Andreoli, Irene; Pezzoli, Andrea; Melacarne, Enrico; Pedretti, Giacomo; Sancandi, Flavio; Villa, Corrado; Sun, Zhong; Spagnolini, Umberto; Ielmini, Daniele
A Generalized Block-Matrix Circuit for Closed-Loop Analog In-Memory Computing
2023-01-01 Mannocci, P; Ielmini, D
A spiking recurrent neural network with phase change memory neurons and synapses for the accelerated solution of constraint satisfaction problems
2020-01-01 Pedretti, G.; Mannocci, P.; Hashemkhani, S.; Milo, V.; Melnic, O.; Chicca, E.; Ielmini, D.
A Spiking Recurrent Neural Network with Phase Change Memory Synapses for Decision Making
2020-01-01 Pedretti, G.; Milo, V.; Hashemkhani, S.; Mannocci, P.; Melnic, O.; Chicca, E.; Ielmini, D.
A Universal, Analog, In-Memory Computing Primitive for Linear Algebra Using Memristors
2021-01-01 Mannocci, Piergiulio; Pedretti, Giacomo; Giannone, Elisabetta; Melacarne, Enrico; Sun, Zhong; Ielmini, Daniele
Accelerating massive MIMO in 6G communications by analog in-memory computing circuits
2023-01-01 Mannocci, Piergiulio; Melacarne, Enrico; Pedretti, Giacomo; Villa, Corrado; Sancandi, Flavio; Spagnolini, Umberto; Ielmini, Daniele
Achieving high precision in analog in-memory computing systems
2026-01-01 Mannocci, Piergiulio; Larelli, Giacomo; Bonomi, Marco; Ielmini, Daniele
An analogue in-memory ridge regression circuit with application to massive MIMO acceleration
2022-01-01 Mannocci, P.; Melacarne, E.; Ielmini, D.
An SRAM-based reconfigurable analog in-memory computing circuit for solving linear algebra problems
2023-01-01 Mannocci, P.; Melacarne, E.; Pezzoli, A.; Pedretti, G.; Villa, C.; Sancandi, F.; Spagnolini, U.; Ielmini, D.
An Ultrafast (< 200 ns) Sparse Solution Solver made by HfWOx/VOy Threshold Tunable Neurons
2023-01-01 Chen, Zirui; Zhou, Yue; Xu, Hanxi; Fu, Yaoyao; Li, Yi; He, Y.; Miao, X. -S.; Mannocci, Piergiulio; Ielmini, Daniele
Analog Circuit Design for In-Memory Linear Algebra Accelerators
2025-01-01 Mannocci, Piergiulio; Ielmini, Daniele
Bio-Inspired Computing with Emerging Devices: Bridging 2D Materials and Neuromorphic Architectures
2025-01-01 Farronato, M.; Mannocci, P.; Milozzi, A.; Monzio Compagnoni, C.; Ielmini, D.
Closed-Loop In-Memory Computing for Energy-Efficient Matrix Eigendecomposition
2023-01-01 Mannocci, Piergiulio; Giannone, Elisabetta; Ielmini, Daniele
Compact Modeling and Mitigation of Parasitics in Crosspoint Accelerators of Neural Networks
2024-01-01 Lepri, N.; Glukhov, A.; Mannocci, P.; Porzani, M.; Ielmini, D.
Development of Crosspoint Memory Arrays for Neuromorphic Computing
2024-01-01 Ricci, Saverio; Mannocci, Piergiulio; Farronato, Matteo; Milozzi, Alessandro; Ielmini, Daniele
Emerging Materials and Computing Paradigms for Temporal Signal Analysis
2025-01-01 Zhang, Teng; Wozniak, Stanislaw; Syed, Ghazi Sarwat; Mannocci, Piergiulio; Farronato, Matteo; Ielmini, Daniele; Sebastian, Abu; Yang, Yuchao
Experimental verification and benchmark of in-memory principal component analysis by crosspoint arrays of resistive switching memory
2022-01-01 Mannocci, Piergiulio; Baroni, Andrea; Melacarne, Enrico; Zambelli, Cristian; Olivo, Piero; Perez, Eduardo; Wenger, Christian; Ielmini, Daniele
Forming-Free Resistive Switching Memory Crosspoint Arrays for In-Memory Machine Learning
2022-01-01 Ricci, S; Mannocci, P; Farronato, M; Hashemkhani, S; Ielmini, D