RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

ZACCARIA, VITTORIO
 Distribuzione geografica
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Continente #
NA - Nord America 9.252
EU - Europa 3.686
AS - Asia 2.945
SA - Sud America 610
AF - Africa 117
Continente sconosciuto - Info sul continente non disponibili 87
OC - Oceania 4
Totale 16.701
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Nazione #
US - Stati Uniti d'America 9.086
RU - Federazione Russa 1.384
SG - Singapore 964
CN - Cina 772
IT - Italia 652
BR - Brasile 508
VN - Vietnam 505
UA - Ucraina 282
SE - Svezia 261
DE - Germania 231
KR - Corea 178
GB - Regno Unito 161
FR - Francia 159
FI - Finlandia 143
CA - Canada 119
JP - Giappone 114
AT - Austria 104
HK - Hong Kong 93
IN - India 77
IE - Irlanda 71
NL - Olanda 69
ES - Italia 65
MA - Marocco 62
BD - Bangladesh 35
JO - Giordania 34
AR - Argentina 31
PL - Polonia 27
EC - Ecuador 24
ID - Indonesia 23
BE - Belgio 20
IQ - Iraq 20
MX - Messico 19
VE - Venezuela 19
ZA - Sudafrica 19
PH - Filippine 18
TR - Turchia 18
UZ - Uzbekistan 13
PK - Pakistan 12
SA - Arabia Saudita 12
CH - Svizzera 10
TW - Taiwan 10
PY - Paraguay 9
JM - Giamaica 8
CI - Costa d'Avorio 7
CL - Cile 7
LT - Lituania 7
TH - Thailandia 7
AE - Emirati Arabi Uniti 6
BG - Bulgaria 6
DZ - Algeria 6
KE - Kenya 6
AZ - Azerbaigian 5
BJ - Benin 5
CO - Colombia 5
CR - Costa Rica 5
NP - Nepal 5
PE - Perù 5
PT - Portogallo 5
RO - Romania 5
AU - Australia 4
EG - Egitto 4
LB - Libano 4
OM - Oman 4
BB - Barbados 3
BH - Bahrain 3
CZ - Repubblica Ceca 3
GR - Grecia 3
IL - Israele 3
IR - Iran 3
TT - Trinidad e Tobago 3
AL - Albania 2
BO - Bolivia 2
DO - Repubblica Dominicana 2
ET - Etiopia 2
EU - Europa 2
HU - Ungheria 2
KG - Kirghizistan 2
MD - Moldavia 2
MU - Mauritius 2
NI - Nicaragua 2
RS - Serbia 2
SN - Senegal 2
AD - Andorra 1
BS - Bahamas 1
BY - Bielorussia 1
EE - Estonia 1
GA - Gabon 1
GI - Gibilterra 1
GT - Guatemala 1
HR - Croazia 1
LK - Sri Lanka 1
LV - Lettonia 1
ME - Montenegro 1
MK - Macedonia 1
MY - Malesia 1
NO - Norvegia 1
PA - Panama 1
PR - Porto Rico 1
PS - Palestinian Territory 1
SK - Slovacchia (Repubblica Slovacca) 1
Totale 16.612
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Città #
Ashburn 1.294
Fairfield 1.030
Woodbridge 674
Houston 599
San Jose 599
Singapore 547
Seattle 463
Chandler 423
Wilmington 395
Cambridge 386
Ann Arbor 319
Council Bluffs 238
Santa Clara 233
Moscow 206
Beijing 191
Milan 177
Seoul 170
Jacksonville 158
The Dalles 158
Boardman 146
Dallas 132
Hefei 129
Dearborn 122
Tokyo 106
Dong Ket 97
Medford 94
Hanoi 93
Vienna 93
Lawrence 92
Los Angeles 89
Lauterbourg 84
Ottawa 80
North Charleston 75
Dublin 71
Hong Kong 69
Ho Chi Minh City 67
San Diego 58
New York 52
São Paulo 52
Rome 46
Málaga 44
Helsinki 42
Des Moines 39
Buffalo 35
Phoenix 35
Amman 33
Kenitra 31
Amsterdam 29
Frankfurt am Main 28
Casablanca 27
Las Vegas 27
London 24
Orem 22
Brussels 20
Da Nang 20
Shanghai 20
Stockholm 20
Warsaw 20
Brooklyn 19
Guangzhou 19
Chicago 18
Rio de Janeiro 18
Montreal 16
Belo Horizonte 14
Naples 14
Turku 14
Auburn Hills 13
Chennai 13
Denver 13
Haiphong 13
Mountain View 13
Nuremberg 13
Jakarta 12
Kent 12
Lucca 12
Norwalk 12
Tashkent 12
Tianjin 12
Bologna 11
Columbus 11
Hangzhou 11
Turin 11
Verona 11
Johannesburg 10
Miami 10
Redondo Beach 10
Curitiba 9
Florence 9
Guayaquil 9
Poplar 9
Taipei 9
Düsseldorf 8
Indiana 8
Wuhan 8
Abidjan 7
Atlanta 7
Brasília 7
Falls Church 7
Mexico City 7
Munich 7
Totale 11.101
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Nome #
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures 298
A Design Framework to Efficiently Explore Energy-Delay Tradeoffs 259
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures 256
DeSpErate++: An enhanced design space exploration framework using predictive simulation scheduling 256
AES power attack based on induced cache miss and countermeasure 249
A Flexible Framework for Fast Multi-Objective Design Space Exploration of Embedded Systems 244
A System-Level Methodology for Fast Multi-Objective Design Space Exploration 241
About the performances of the advanced encryption standard in embedded systems with cache memory 236
SPIRIT: Spectral-Aware Pareto Iterative Refinement Optimization for Supervised High-Level Synthesis 234
A Correlation-Based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip 230
Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering 217
An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 217
Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach 217
OpenCL application auto-tuning and run-time resource management for multi-core platforms 217
An instruction-level methodology for power estimation and optimization of embedded VLIW cores 214
On the Role of Context in the Design of Mobile Mashups 214
Customization of OpenCL Applications for Efficient Task Mapping Under Heterogeneous Platform Constraints 213
Branch Prediction Techniques for Low-Power VLIW Processors 212
A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip 212
Combining application adaptivity and system-wide Resource Management on multi-core platforms 211
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems 208
An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods 204
Variability-Aware Robust Design Space Exploration of Chip Multiprocessor Architectures 200
A framework for Compiler Level statistical analysis over customized VLIW architecture 200
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems 200
Data Parallel Application Adaptivity and System-Wide Resource Management in Many-Core Architectures 199
A Meta-Model Assisted Coprocessor Synthesis Framework for Compiler/Architecture Parameters Customization 199
Design Space Exploration Supporting Run-time Resource Management 197
Parallel paradigms and run-time management techniques for many-core architectures: the 2parma approach 194
A Framework for Modeling and Estimating the Energy Dissipation of VLIW-based Embedded Systems 193
An Instruction-Level Energy Model for Embedded VLIW Architectures 190
Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures 184
A Variability-Aware Robust Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 184
Evaluating orthogonality between application auto-tuning and run-time resource management for adaptive OpenCL applications 184
ARTE: An Application-specific Run-Time managEment framework for multi-cores based on queuing models 183
Parallel paradigms and run-time management techniques for many-core architectures 182
An Agent-based Approach to Full Interoperability and Allocation Transparency in Distributed File Systems 181
Symbolic Analysis of Higher-Order Side Channel Countermeasures 181
A Power Modeling and Estimation Framework for VLIW-based Embedded Systems 180
Exploiting Data Forwarding to Reduce the Power Budget of VLIW Embedded Processors 175
On the spectral features of robust probing security 175
Linking run-time resource management of embedded multi-core platforms with automated design-time exploration 173
Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips 172
Improving Simulation Speed and Accuracy for Many-Core Embedded Platforms with Ensemble Models 170
Low-Power Data Forwarding for VLIW Embedded Architectures 169
ARTE: an Application-specific Run-Time Management Framework for Multi-core Systems 166
Conversational Data Exploration 166
Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip 165
ADD-based Spectral Analysis of Probing Security 163
Power Estimation and Optimization Methodologies for VLIW-Based Embedded Systems 162
Fast System-Level Exploration of Memory Architectures Driven by Energy-Delay Metrics 161
Low-Power Branch Prediction Techniques for VLIW Architectures: A Compiler-Hints Based Approach 161
System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip 161
A power attack methodology to AES based on induced cache misses: procedure, evaluation and possible countermeasures 160
Design Space Exploration for Run-time Management of a Reconfigurable System for Video Streaming 158
Context-aware access to heterogeneous resources through on-the-fly mashups 158
MULTICUBE: Multi-objective design space exploration of multi-core architectures 157
Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques 153
DeSpErate: Speeding-up design space exploration by using predictive simulation scheduling 153
Instruction-Level Power Estimation for Embedded VLIW Cores 151
Power Exploration for Embedded VLIW Architectures 147
Robust Optimization of SoC Architectures: A Multi-Scenario Approach 146
A relation calculus for reasoning about t-probing security 142
Energy-Performance Design Space Exploration of SMT Architectures Exploiting Selective Load Value Predictions 142
An exploration methodology for a customizable OpenCL stereo-matching application targeted to an industrial multi-cluster architecture 142
Darth's Saber: A Key Exfiltration Attack for Symmetric Ciphers Using Laser Light 140
Design-space exploration and runtime resource management for multicores 140
Power-Performance System-Level Exploration of a MicroSPARC2-based Embedded Architecture 138
Multi-Objective Design Space Exploration of Embedded Systems 138
The MULTICUBE Design Flow 138
OSCAR: an Optimization Methodology Exploiting Spatial Correlation in Multi-core Design Spaces 136
An industrial design space exploration framework for supporting run-time resource management on multi-core systems 135
ReSPIR: A Response Surface-Based Pareto Iterative Refinement for Application-Specific Design Space Exploration 134
MULTICUBE: Multi-objective Design Space Exploration of Multi-core Architectures 132
Run-time optimization of a dynamically reconfigurable embedded system through performance prediction 131
CASCA: A Design Automation Approach for Designing Hardware Countermeasures Against Side-Channel Attacks 127
Multicube Explorer: An Open Source Framework for Design Space Exploration of Chip Multi-Processors 126
How might the iPad change healthcare? 125
Optimization Algorithms for Design Space Exploration of Embedded Systems 123
Power-Aware Branch Prediction Techniques: A Compiler-Hints Based Approach for VLIW Processors 122
Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration 119
Efficient Attack-Surface Exploration for Electromagnetic Fault Injection 118
ConceptOS: A Micro-Kernel Approach to Firmware Updates of Always-On Resource-Constrained Hubris-Based IoT Systems 118
Reducing the complexity of instruction-level power models for VLIW processors 116
Design Space Exploration of Parallel Architectures 115
An F-algebra for analysing information leaks in the presence of glitches 114
Toward truly personal chatbots: On the Development of Custom Conversational Assistants 112
Spectral Features of Higher-Order Side-Channel Countermeasures 111
Power Reduction on VLIW Processors through Data Forwarding 110
Floorplanning-aware design space exploration for application-specific hierarchical networks on-chip 109
Process for translating instructions for an arm-type processor into instructions for a LX-type processor; relative translator device and computer program product 109
On robust strong-non-interferent low-latency multiplications 108
Processor architecture with variable-stage pipeline 107
System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip 106
Evaluating Run-time Resource Management Policies for Multi-core Embedded Platforms with the EMME Evaluation Framework 103
Processor Architecture 101
Response Surface Modeling for Design Space Exploration of Embedded Systems 98
Layer-wise Exploration of a Neural Processing Unit Compiler's Optimization Space 96
An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks 90
Interruptible Remote Attestation of Low-end IoT Microcontrollers via Performance Counters 78
Totale 16.561
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Categoria #
all - tutte 48.102
article - articoli 11.466
book - libri 413
conference - conferenze 30.954
curatela - curatele 0
other - altro 0
patent - brevetti 936
selected - selezionate 0
volume - volumi 4.013
Totale 95.884
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/2022682 0 0 64 34 111 49 50 53 38 43 88 152
2022/2023945 120 81 19 132 105 125 7 68 144 65 60 19
2023/2024424 32 91 27 39 40 46 19 32 0 21 5 72
2024/20251.699 14 57 49 28 276 110 63 181 224 128 281 288
2025/20266.596 1.081 1.095 295 489 358 381 1.088 312 343 619 128 407
2026/2027392 120 166 106 0 0 0 0 0 0 0 0 0
Totale 16.701