RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

ZACCARIA, VITTORIO
 Distribuzione geografica
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Continente #
NA - Nord America 6.479
EU - Europa 1.606
AS - Asia 841
SA - Sud America 171
AF - Africa 18
Continente sconosciuto - Info sul continente non disponibili 2
OC - Oceania 2
Totale 9.119
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Nazione #
US - Stati Uniti d'America 6.394
SG - Singapore 394
IT - Italia 324
UA - Ucraina 276
SE - Svezia 248
VN - Vietnam 193
DE - Germania 185
BR - Brasile 156
FI - Finlandia 128
GB - Regno Unito 114
CN - Cina 108
AT - Austria 103
CA - Canada 83
IE - Irlanda 66
ES - Italia 51
IN - India 34
NL - Olanda 32
FR - Francia 30
JO - Giordania 30
HK - Hong Kong 21
BE - Belgio 19
ID - Indonesia 12
KR - Corea 10
AR - Argentina 6
TR - Turchia 6
BJ - Benin 5
CI - Costa d'Avorio 5
AZ - Azerbaigian 4
BD - Bangladesh 4
BG - Bulgaria 4
CH - Svizzera 4
IQ - Iraq 4
PL - Polonia 3
PT - Portogallo 3
PY - Paraguay 3
RU - Federazione Russa 3
ZA - Sudafrica 3
AU - Australia 2
CZ - Repubblica Ceca 2
EC - Ecuador 2
EU - Europa 2
GR - Grecia 2
JP - Giappone 2
KG - Kirghizistan 2
LB - Libano 2
MU - Mauritius 2
PH - Filippine 2
PK - Pakistan 2
RO - Romania 2
UZ - Uzbekistan 2
VE - Venezuela 2
AE - Emirati Arabi Uniti 1
AL - Albania 1
BH - Bahrain 1
CL - Cile 1
CR - Costa Rica 1
EE - Estonia 1
HU - Ungheria 1
IL - Israele 1
IR - Iran 1
KE - Kenya 1
LK - Sri Lanka 1
LT - Lituania 1
LV - Lettonia 1
MA - Marocco 1
NI - Nicaragua 1
NO - Norvegia 1
OM - Oman 1
PE - Perù 1
PS - Palestinian Territory 1
SK - Slovacchia (Repubblica Slovacca) 1
TH - Thailandia 1
TM - Turkmenistan 1
TN - Tunisia 1
Totale 9.119
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Città #
Fairfield 1.030
Woodbridge 673
Houston 593
Ashburn 515
Seattle 463
Chandler 423
Wilmington 393
Cambridge 386
Ann Arbor 319
Singapore 241
Santa Clara 203
Jacksonville 157
Boardman 135
Dearborn 122
Council Bluffs 98
Dong Ket 97
Medford 94
Lawrence 92
Vienna 92
Ottawa 80
Dublin 66
Milan 64
San Diego 57
Málaga 44
Helsinki 40
Beijing 38
Des Moines 37
Amman 30
Amsterdam 22
Brussels 19
New York 18
The Dalles 17
Hong Kong 14
Auburn Hills 13
Mountain View 13
Shanghai 13
Norwalk 12
São Paulo 12
Jakarta 11
Columbus 10
Lucca 10
Verona 10
London 9
Los Angeles 9
Belo Horizonte 8
Dallas 8
Düsseldorf 8
Indiana 8
Rio de Janeiro 8
Falls Church 7
Lauterbourg 7
Nuremberg 7
Redwood City 7
Stockholm 7
Ha Kwai Chung 6
Abidjan 5
Cotonou 5
Frankfurt am Main 5
Miami 5
Seongnam 5
Washington 5
Baku 4
Curitiba 4
Falkenstein 4
Kilburn 4
Klagenfurt 4
Kunming 4
Medina 4
Turin 4
Aracaju 3
Chiswick 3
Dhaka 3
Duque de Caxias 3
Graz 3
Grenoble 3
Groningen 3
Guangzhou 3
Hefei 3
Kaisheim 3
Livorno 3
Munich 3
Nanjing 3
Prescot 3
Redmond 3
Santo André 3
Seoul 3
Tappahannock 3
Warsaw 3
Acton 2
Bangalore 2
Barcelona 2
Bari 2
Bauru 2
Bergamo 2
Bern 2
Bishkek 2
Blumenau 2
Bochum 2
Bologna 2
Brasília 2
Totale 7.018
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Nome #
SPIRIT: Spectral-Aware Pareto Iterative Refinement Optimization for Supervised High-Level Synthesis 175
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures. 158
Energy Estimation and Optimization of Embedded VLIW Processors based on Instruction Clustering 156
An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 156
An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods 146
AES power attack based on induced cache miss and countermeasure 141
Branch Prediction Techniques for Low-Power VLIW Processors 140
A System-Level Methodology for Fast Multi-Objective Design Space Exploration 139
A Flexible Framework for Fast Multi-Objective Design Space Exploration of Embedded Systems 139
Design Space Exploration Supporting Run-time Resource Management 138
Variability-Aware Robust Design Space Exploration of Chip Multiprocessor Architectures 135
A Correlation-Based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip 134
About the performances of the advanced encryption standard in embedded systems with cache memory 133
DeSpErate++: An enhanced design space exploration framework using predictive simulation scheduling 132
Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures 131
A Design Framework to Efficiently Explore Energy-Delay Tradeoffs 129
Linking run-time resource management of embedded multi-core platforms with automated design-time exploration 126
A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip 123
An instruction-level methodology for power estimation and optimization of embedded VLIW cores 120
Exploiting Data Forwarding to Reduce the Power Budget of VLIW Embedded Processors 120
On the Role of Context in the Design of Mobile Mashups 119
ARTE: An Application-specific Run-Time managEment framework for multi-cores based on queuing models 118
Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach 117
Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip 115
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures 115
ARTE: an Application-specific Run-Time Management Framework for Multi-core Systems 115
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems 115
OpenCL application auto-tuning and run-time resource management for multi-core platforms 114
Fast System-Level Exploration of Memory Architectures Driven by Energy-Delay Metrics 112
Parallel paradigms and run-time management techniques for many-core architectures: 2parma approach 112
A Variability-Aware Robust Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 110
Robust Optimization of SoC Architectures: A Multi-Scenario Approach 110
Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips 109
A Framework for Modeling and Estimating the Energy Dissipation of VLIW-based Embedded Systems 107
A framework for Compiler Level statistical analysis over customized VLIW architecture 107
An Instruction-Level Energy Model for Embedded VLIW Architectures 106
Design Space Exploration for Run-time Management of a Reconfigurable System for Video Streaming 106
An exploration methodology for a customizable OpenCL stereo-matching application targeted to an industrial multi-cluster architecture 105
Data Parallel Application Adaptivity and System-Wide Resource Management in Many-Core Architectures 104
A Meta-Model Assisted Coprocessor Synthesis Framework for Compiler/Architecture Parameters Customization 104
Customization of OpenCL Applications for Efficient Task Mapping Under Heterogeneous Platform Constraints 104
Evaluating orthogonality between application auto-tuning and run-time resource management for adaptive OpenCL applications 102
Combining application adaptivity and system-wide Resource Management on multi-core platforms 102
Parallel paradigms and run-time management techniques for many-core architectures 100
Symbolic Analysis of Higher-Order Side Channel Countermeasures 100
Low-Power Branch Prediction Techniques for VLIW Architectures: A Compiler-Hints Based Approach 99
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems 99
Power Exploration for Embedded VLIW Architectures 98
Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques 97
Instruction-Level Power Estimation for Embedded VLIW Cores 96
Low-Power Data Forwarding for VLIW Embedded Architectures 95
Power Estimation and Optimization Methodologies for VLIW-Based Embedded Systems 94
An Agent-based Approach to Full Interoperability and Allocation Transparency in Distributed File Systems 94
OSCAR: an Optimization Methodology Exploiting Spatial Correlation in Multi-core Design Spaces 91
System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip 90
Improving Simulation Speed and Accuracy for Many-Core Embedded Platforms with Ensemble Models 90
Conversational Data Exploration 88
An industrial design space exploration framework for supporting run-time resource management on multi-core systems 86
Run-time optimization of a dynamically reconfigurable embedded system through performance prediction 86
Power-Aware Branch Prediction Techniques: A Compiler-Hints Based Approach for VLIW Processors 83
Multi-Objective Design Space Exploration of Embedded Systems 81
MULTICUBE: Multi-objective Design Space Exploration of Multi-core Architectures 81
The MULTICUBE Design Flow 81
DeSpErate: Speeding-up design space exploration by using predictive simulation scheduling 81
Energy-Performance Design Space Exploration of SMT Architectures Exploiting Selective Load Value Predictions 79
Context-aware access to heterogeneous resources through on-the-fly mashups 78
On the spectral features of robust probing security 77
MULTICUBE: Multi-objective design space exploration of multi-core architectures 76
How might the iPad change healthcare? 76
Power-Performance System-Level Exploration of a MicroSPARC2-based Embedded Architecture 75
A Power Modeling and Estimation Framework for VLIW-based Embedded Systems 73
ReSPIR: A Response Surface-Based Pareto Iterative Refinement for Application-Specific Design Space Exploration 73
Design Space Exploration of Parallel Architectures 72
Design-space exploration and runtime resource management for multicores 71
Reducing the complexity of instruction-level power models for VLIW processors 70
Floorplanning-aware design space exploration for application-specific hierarchical networks on-chip 68
Darth's Saber: A Key Exfiltration Attack for Symmetric Ciphers Using Laser Light 65
Optimization Algorithms for Design Space Exploration of Embedded Systems 64
CASCA: A Design Automation Approach for Designing Hardware Countermeasures Against Side-Channel Attacks 62
Power Reduction on VLIW Processors through Data Forwarding 58
Spectral Features of Higher-Order Side-Channel Countermeasures 58
System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip 56
Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration 56
Process for translating instructions for an arm-type processor into instructions for a LX-type processor; relative translator device and computer program product 53
A power attack methodology to AES based on induced cache misses: procedure, evaluation and possible countermeasures 53
Evaluating Run-time Resource Management Policies for Multi-core Embedded Platforms with the EMME Evaluation Framework 52
Multicube Explorer: An Open Source Framework for Design Space Exploration of Chip Multi-Processors 49
Response Surface Modeling for Design Space Exploration of Embedded Systems 49
An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks 48
Processor architecture with variable-stage pipeline 47
Processor Architecture 42
An F-algebra for analysing information leaks in the presence of glitches 40
ADD-based Spectral Analysis of Probing Security 39
Toward truly personal chatbots: On the Development of Custom Conversational Assistants 32
On robust strong-non-interferent low-latency multiplications 32
A relation calculus for reasoning about t-probing security 29
null 29
Efficient Attack-Surface Exploration for Electromagnetic Fault Injection 23
Low Effort, High Accuracy Network-on-Chip Power Macro ModelingIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 22
Layer-wise Exploration of a Neural Processing Unit Compiler's Optimization Space 17
Totale 9.172
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Categoria #
all - tutte 30.319
article - articoli 7.154
book - libri 254
conference - conferenze 19.667
curatela - curatele 0
other - altro 0
patent - brevetti 508
selected - selezionate 0
volume - volumi 2.571
Totale 60.473
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/2020285 0 0 0 0 0 0 0 0 0 0 213 72
2020/20211.314 110 72 126 66 89 93 91 108 87 136 99 237
2021/2022863 30 151 64 34 111 49 50 53 38 43 88 152
2022/2023945 120 81 19 132 105 125 7 68 144 65 60 19
2023/2024424 32 91 27 39 40 46 19 32 0 21 5 72
2024/20251.188 14 57 49 28 276 110 63 181 224 128 58 0
Totale 9.202