On robust strong-non-interferent low-latency multiplications

The overarching goal of this work is to present new theoretical and practical tools to implement (Formula presented.) −probing security. In this work, a low-latency multiplication gadget that is secure against probing attacks that exploit logic glitches in the circuit is presented. The gadget is the first of its kind to present a 1-cycle input-to-output latency while belonging to the class of probing security by optimized composition gadgets [6]. In particular, the authors show that it is possible to construct robust- (Formula presented.) -strong-non-interferent gadgets without compromising on latency with a moderate increase in area. The authors provide a theoretical proof for the robustness of the gadget and show that, for (Formula presented.), the amount of randomness required can even be reduced without compromising on robustness.