RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

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Mostrati risultati da 1 a 50 di 183
Titolo Data di pubblicazione Autori File
A System-Level Methodology for Fast Multi-Objective Design Space Exploration 1-gen-2003 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO +
A Flexible Framework for Fast Multi-Objective Design Space Exploration of Embedded Systems 1-gen-2003 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
Branch Prediction Techniques for Low-Power VLIW Processors 1-gen-2003 PALERMO, GIANLUCASAMI, MARIAGIOVANNASILVANO, CRISTINAZACCARIA, VITTORIO +
Power-Performance System-Level Exploration of a MicroSPARC2-based Embedded Architecture 1-gen-2003 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
Plug-in of Power Models in the StepNP Exploration Platform: Analysis of Power/Performance Trade-offs 1-gen-2004 BELTRAME, GIOVANNIPALERMO, GIANLUCASCIUTO, DONATELLASILVANO, CRISTINA
Multi-Objective Co-Exploration of Source Code Transformations and Design Space Architecture for Low-Power Embedded Systems 1-gen-2004 AGOSTA, GIOVANNIPALERMO, GIANLUCASILVANO, CRISTINA
Power-Aware Branch Prediction Techniques: A Compiler-Hints Based Approach for VLIW Processors 1-gen-2004 PALERMO, GIANLUCASAMI, MARIAGIOVANNASILVANO, CRISTINAZACCARIA, VITTORIO +
PIRATE: A Framework for Power/Performance Exploration of Network-On-Chip Architectures 1-gen-2004 PALERMO, GIANLUCASILVANO, CRISTINA
Low-Power Branch Prediction Techniques for VLIW Architectures: A Compiler-Hints Based Approach 1-gen-2005 PALERMO, GIANLUCASAMI, MARIAGIOVANNASILVANO, CRISTINAZACCARIA, VITTORIO +
Multi-Objective Design Space Exploration of Embedded Systems 1-gen-2005 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
Energy/Performance Evaluation of the Multithreaded Extion of a Muulticluster VLIW Processor 1-gen-2005 BARRETTA, DOMENICOPALERMO, GIANLUCASAMI, MARIAGIOVANNA +
The Combined Perceptron Branch Predictor 1-gen-2005 MONCHIERO, MATTEOPALERMO, GIANLUCA
Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip 1-gen-2005 MONCHIERO, MATTEOPALERMO, GIANLUCAVILLA, ORESTE +
AES power attack based on induced cache miss and countermeasure 1-gen-2005 BERTONI, GUIDO MARCOBREVEGLIERI, LUCA ODDONEMONCHIERO, MATTEOPALERMO, GIANLUCAZACCARIA, VITTORIO
Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors 1-gen-2006 MONCHIERO, MATTEOPALERMO, GIANLUCASILVANO, CRISTINAVILLA, ORESTE
Efficient Synchronization for Embedded on-Chip Multiprocessors 1-gen-2006 PALERMO, GIANLUCASILVANO, CRISTINA +
Power/Performance Hardware Optimization for Synchronization Intensive Applications in MPSoCs 1-gen-2006 MONCHIERO, MATTEOPALERMO, GIANLUCASILVANO, CRISTINAVILLA, ORESTE
A power attack methodology to AES based on induced cache misses: procedure, evaluation and possible countermeasures 1-gen-2006 BERTONI, GUIDO MARCOBREVEGLIERI, LUCA ODDONEMONCHIERO, MATTEOPALERMO, GIANLUCAZACCARIA, VITTORIO
An Efficient Synchronization Technique for Multiprocessor Systems on-Chip 1-gen-2006 MONCHIERO, MATTEOPALERMO, GIANLUCASILVANO, CRISTINAVILLA, ORESTE
Low-power Architectures for Mobile Systems 1-gen-2006 BREVEGLIERI, LUCA ODDONEMAISTRI, PAOLOMONCHIERO, MATTEONEGRI, LUCAPALERMO, GIANLUCASAMI, MARIAGIOVANNASILVANO, CRISTINAVILLA, ORESTE +
Using Speculative Computation and Parallelizing Techniques to Improve Scheduling of Control based Designs 1-gen-2006 FERRANDI, FABRIZIOPALERMO, GIANLUCASANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors 1-gen-2007 PALERMO, GIANLUCASILVANO, CRISTINA +
Partitioning and Mapping for the hArtes European Project 1-gen-2007 FERRANDI, FABRIZIOFOSSATI, LUCALATTUADA, MARCOPALERMO, GIANLUCASCIUTO, DONATELLATUMEO, ANTONINO
An Internal Partial Dynamic Reconfiguration Implementation of the JPEG Encoder for Low-Cost FPGAs 1-gen-2007 FERRANDI, FABRIZIOMONCHIERO, MATTEOPALERMO, GIANLUCASCIUTO, DONATELLATUMEO, ANTONINO
Automatic parallelization of sequential specifications for symmetric MPSoCs 1-gen-2007 FERRANDI, FABRIZIOFOSSATI, LUCALATTUADA, MARCOPALERMO, GIANLUCASCIUTO, DONATELLATUMEO, ANTONINO
An Evolutionary Approach to Area-Time Optimization of FPGA designs 1-gen-2007 FERRANDI, FABRIZIOLANZI, PIER LUCAPALERMO, GIANLUCAPILATO, CHRISTIANSCIUTO, DONATELLATUMEO, ANTONINO
An Interrupt Controller for FPGA-based Multiprocessors 1-gen-2007 FERRANDI, FABRIZIOMONCHIERO, MATTEOPALERMO, GIANLUCASCIUTO, DONATELLATUMEO, ANTONINO +
Self Reconfigurable Implementation of the JPEG Encoder 1-gen-2007 FERRANDI, FABRIZIOPALERMO, GIANLUCASCIUTO, DONATELLATUMEO, ANTONINO +
Efficient Architecture/Compiler Co-Exploration Using Analytical Models 1-gen-2007 SILVANO, CRISTINAAGOSTA, GIOVANNIPALERMO, GIANLUCA
A Topology Design Customization Approach for STNoC 1-gen-2007 PALERMO, GIANLUCASILVANO, CRISTINA +
A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs 1-gen-2007 FERRANDI, FABRIZIOMONCHIERO, MATTEOPALERMO, GIANLUCASCIUTO, DONATELLATUMEO, ANTONINO
Fitness Inheritance in Evolutionary and Multi-Objective High-Level Synthesis 1-gen-2007 FERRANDI, FABRIZIOLANZI, PIER LUCAPALERMO, GIANLUCAPILATO, CHRISTIANSCIUTO, DONATELLATUMEO, ANTONINO
A Design Kit for a Fully Working Shared Memory Multiprocessor on FPGA 1-gen-2007 FERRANDI, FABRIZIOMONCHIERO, MATTEOPALERMO, GIANLUCASCIUTO, DONATELLATUMEO, ANTONINO
Application-Specific Topology Design Customization for STNoC 1-gen-2007 PALERMO, GIANLUCASILVANO, CRISTINA +
A Data Protection Unit for NoC-based Architectures 1-gen-2007 PALERMO, GIANLUCASILVANO, CRISTINA +
Mapping and Topology Customization Approaches for Application-Specific STNoC Designs 1-gen-2007 PALERMO, GIANLUCASILVANO, CRISTINA +
Security in Networks-on-Chips 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINASAMI, MARIAGIOVANNA +
An Efficient Design Space Exploration Methodology for Multi-Cluster VLIW Architectures based on Artificial Neural Networks 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO +
PROGRAMMABLE DATA PROTECTION DEVICE, SECURE PROGRAMMING MANAGER SYSTEM AND PROCESS FOR CONTROLLING ACCESS TO AN INTERCONNECT NETWORK FOR AN INTEGRATED CIRCUIT 1-gen-2008 SILVANO, CRISTINAPALERMO, GIANLUCA +
Implementation of a Reconfigurable Data Protection Module for NoC-based MPSoC 1-gen-2008 PALERMO, GIANLUCA +
A Security Monitoring Service for NoCs 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINA +
Lightweight DMA management mechanisms for multiprocessors on FPGA 1-gen-2008 TUMEO, ANTONINOMONCHIERO, MATTEOPALERMO, GIANLUCAFERRANDI, FABRIZIOSCIUTO, DONATELLA
Robust Optimization of SoC Architectures: A Multi-Scenario Approach 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
Secure Memory Accesses on Networks-on-Chip 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINA +
A dual-priority real-time multiprocessor system on FPGA for automotive applications 1-gen-2008 PALERMO, GIANLUCAFERRANDI, FABRIZIOSCIUTO, DONATELLA +
An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
Improving Evolutionary Exploration to Area-Time Optimization of FPGA Designs 1-gen-2008 PILATO, CHRISTIANTUMEO, ANTONINOPALERMO, GIANLUCAFERRANDI, FABRIZIOLANZI, PIER LUCASCIUTO, DONATELLA
Efficiency and Scalability of Barrier Synchronization on NoC Based Many-core Architectures 1-gen-2008 VILLA, ORESTEPALERMO, GIANLUCASILVANO, CRISTINA
An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 1-gen-2008 PALERMO, GIANLUCASILVANO, CRISTINAZACCARIA, VITTORIO
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level 1-gen-2008 MONCHIERO, MATTEOPALERMO, GIANLUCASILVANO, CRISTINAVILLA, ORESTE
Mostrati risultati da 1 a 50 di 183
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