RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

PALERMO, GIANLUCA
 Distribuzione geografica
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Continente #
NA - Nord America 11.156
EU - Europa 2.805
AS - Asia 652
AF - Africa 21
SA - Sud America 8
OC - Oceania 6
Continente sconosciuto - Info sul continente non disponibili 5
Totale 14.653
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Nazione #
US - Stati Uniti d'America 11.005
IT - Italia 791
UA - Ucraina 403
VN - Vietnam 356
SE - Svezia 335
DE - Germania 251
FI - Finlandia 223
AT - Austria 202
GB - Regno Unito 167
ES - Italia 156
CN - Cina 155
CA - Canada 151
IE - Irlanda 117
IN - India 54
BE - Belgio 41
NL - Olanda 34
FR - Francia 33
JO - Giordania 32
SG - Singapore 16
CI - Costa d'Avorio 12
HK - Hong Kong 12
GR - Grecia 11
CZ - Repubblica Ceca 10
CH - Svizzera 9
KR - Corea 9
MU - Mauritius 8
PL - Polonia 8
BR - Brasile 6
JP - Giappone 6
EU - Europa 5
TR - Turchia 5
AL - Albania 4
PT - Portogallo 4
AU - Australia 3
NZ - Nuova Zelanda 3
PK - Pakistan 3
RU - Federazione Russa 3
ID - Indonesia 2
BO - Bolivia 1
DZ - Algeria 1
HU - Ungheria 1
IR - Iran 1
NO - Norvegia 1
OM - Oman 1
PY - Paraguay 1
RO - Romania 1
Totale 14.653
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Città #
Fairfield 1.961
Woodbridge 1.250
Ashburn 998
Houston 966
Seattle 836
Chandler 814
Wilmington 752
Cambridge 741
Ann Arbor 607
Milan 258
Jacksonville 232
Dearborn 218
Vienna 202
Dong Ket 199
Medford 163
Lawrence 156
Málaga 148
Ottawa 142
Dublin 113
Helsinki 83
San Diego 82
Beijing 65
Des Moines 58
Boardman 54
Norwalk 43
Brussels 35
Redwood City 33
Amman 32
New York 25
Mountain View 23
Falls Church 22
Shanghai 22
Amsterdam 21
Indiana 21
Auburn Hills 18
Florence 17
Miami 17
London 16
Rome 13
Verona 13
Abidjan 12
Redmond 12
Phoenix 11
Columbus 9
Washington 9
Hong Kong 8
Richland 8
Yellow Springs 8
Bergamo 7
Groningen 7
Turin 7
Hefei 6
Kunming 6
Los Angeles 6
Seongnam 6
Warsaw 6
Bologna 5
Muglinov 5
Munich 5
Nanjing 5
Siena 5
Vedano al Lambro 5
Bresso 4
Chiswick 4
Fremont 4
Gavirate 4
Kilburn 4
Livorno 4
Nanchang 4
Tokyo 4
Americana 3
Athens 3
Atlanta 3
Berlin 3
Bern 3
Cortenuova 3
Enna 3
Erbusco 3
Gelsenkirchen 3
Grenoble 3
Guangzhou 3
Izmir 3
Jinan 3
Kumar 3
Limbiate 3
Lisbon 3
Madrid 3
Napoli 3
Pavone Canavese 3
Prescot 3
Seregno 3
Trieste 3
Uppsala 3
Arlington 2
Bangalore 2
Barcelona 2
Boydton 2
Brescia 2
Burke 2
Cantu 2
Totale 11.742
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Nome #
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level 189
A Design Kit for a Fully Working Shared Memory Multiprocessor on FPGA 172
An Evolutionary Approach to Area-Time Optimization of FPGA designs 160
SPIRIT: Spectral-Aware Pareto Iterative Refinement Optimization for Supervised High-Level Synthesis 158
Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors 155
An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 147
CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties 141
Using Speculative Computation and Parallelizing Techniques to Improve Scheduling of Control based Designs 137
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures. 137
The Combined Perceptron Branch Predictor 136
An Efficient Design Space Exploration Methodology for Multiprocessor SoC Architectures based on Response Surface Methods 135
Efficiency and Scalability of Barrier Synchronization on NoC Based Many-core Architectures 133
A System-Level Methodology for Fast Multi-Objective Design Space Exploration 132
Throughput balancing for energy efficient near-threshold manycores 132
A Data Protection Unit for NoC-based Architectures 131
Exploring efficient hardware support for applications with irregular memory patterns on multinode manycore architectures 131
Fitness Inheritance in Evolutionary and Multi-Objective High-Level Synthesis 131
Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip 130
Branch Prediction Techniques for Low-Power VLIW Processors 130
Accelerating a Geometric Approach to Molecular Docking with OpenACC 130
The ANTAREX approach to autotuning and adaptivity for energy efficient HPC Systems 129
Variability-Aware Robust Design Space Exploration of Chip Multiprocessor Architectures 128
A multiprocessor self-reconfigurable jpeg2000 encoder 128
Low-power Architectures for Mobile Systems 127
Design Space Exploration Supporting Run-time Resource Management 127
A Flexible Framework for Fast Multi-Objective Design Space Exploration of Embedded Systems 125
Real-time considerations for rugged embedded systems 124
Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures 123
DeSpErate++: An enhanced design space exploration framework using predictive simulation scheduling 122
AES power attack based on induced cache miss and countermeasure 120
A Correlation-Based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip 120
Application autotuning to support runtime adaptivity in multicore architectures 119
Mapping and Topology Customization Approaches for Application-Specific STNoC Designs 117
An Efficient Synchronization Technique for Multiprocessor Systems on-Chip 117
A Compact Transactional Memory Multiprocessor System on FPGA 117
A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs 116
CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties 116
mARGOt: a Dynamic Autotuning Framework for Self-aware Approximate Computing 116
Linking run-time resource management of embedded multi-core platforms with automated design-time exploration 116
A Security Monitoring Service for NoCs 115
Lightweight DMA management mechanisms for multiprocessors on FPGA 115
SOCRATES - A seamless online compiler and system runtime autotuning framework for energy-aware applications 112
A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processors System on-Chip 111
Early stage interference checking for automatic design space exploration of mixed critical systems 111
ARTE: An Application-specific Run-Time managEment framework for multi-cores based on queuing models 111
A Topology Design Customization Approach for STNoC 110
Self Reconfigurable Implementation of the JPEG Encoder 107
Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip 106
An Interrupt Controller for FPGA-based Multiprocessors 106
Automatic parallelization of sequential specifications for symmetric MPSoCs 104
MiCOMP: Mitigating the Compiler Phase-Ordering Problem Using Optimization Sub-Sequences and Machine Learning 104
Run-time resource management based on design space exploration 104
ARTE: an Application-specific Run-Time Management Framework for Multi-core Systems 103
Robust Optimization of SoC Architectures: A Multi-Scenario Approach 103
Floorplan-aware hierarchical NoC topology with GALS interfaces 101
Parallel paradigms and run-time management techniques for many-core architectures: 2parma approach 100
A dual-priority real-time multiprocessor system on FPGA for automotive applications 100
A survey on compiler autotuning using machine learning 100
Energy/Performance Evaluation of the Multithreaded Extion of a Muulticluster VLIW Processor 99
Yield Enhancement by Robust Application-specific Mapping on Network-on-Chips 99
A Variability-Aware Robust Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints 98
Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach 98
A system-level exploration of power delivery architectures for near-threshold manycores considering performance constraints 97
COBAYN: Compiler autotuning framework using Bayesian networks 97
The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems 96
ANTAREX - AutoTuning and adaptivity approach for energy efficient eXascale HPC systems 95
An exploration methodology for a customizable OpenCL stereo-matching application targeted to an industrial multi-cluster architecture 94
OpenCL application auto-tuning and run-time resource management for multi-core platforms 94
2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-core Architectures 93
Design Space Exploration for Run-time Management of a Reconfigurable System for Video Streaming 93
An Efficient Monte Carlo-based Probabilistic Time-Dependent Routing Calculation Targeting a Server-Side Car Navigation System 93
A framework for Compiler Level statistical analysis over customized VLIW architecture 92
Low-Power Branch Prediction Techniques for VLIW Architectures: A Compiler-Hints Based Approach 91
Predictive modeling methodology for compiler phase-ordering 91
Guest Editorial: Special Issue on Computing Frontiers 91
A Meta-Model Assisted Coprocessor Synthesis Framework for Compiler/Architecture Parameters Customization 91
Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques 90
Efficient Architecture/Compiler Co-Exploration Using Analytical Models 90
A Monitoring System for NoCs 90
PIRATE: A Framework for Power/Performance Exploration of Network-On-Chip Architectures 90
Customization of OpenCL Applications for Efficient Task Mapping Under Heterogeneous Platform Constraints 90
Combining application adaptivity and system-wide Resource Management on multi-core platforms 90
Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors 89
Multi-Objective Co-Exploration of Source Code Transformations and Design Space Architecture for Low-Power Embedded Systems 88
A Bayesian network approach for compiler auto-tuning for embedded processors 87
The ANTAREX domain specific language for high performance computing 87
Exploiting OpenMP and OpenACC to accelerate a geometric approach to molecular docking in heterogeneous HPC nodes 86
Data Parallel Application Adaptivity and System-Wide Resource Management in Many-Core Architectures 85
Variability-Aware Voltage Island Management for Near-Threshold Computing with Performance Guarantees 85
Evaluating orthogonality between application auto-tuning and run-time resource management for adaptive OpenCL applications 84
Implementation of a Reconfigurable Data Protection Module for NoC-based MPSoC 83
Parallel paradigms and run-time management techniques for many-core architectures 83
Power/Performance Hardware Optimization for Synchronization Intensive Applications in MPSoCs 83
COMPLEX - COdesign and power Management in PLatform-based design space EXploration 82
Application-Specific Topology Design Customization for STNoC 81
Secure Memory Accesses on Networks-on-Chip 81
OSCAR: an Optimization Methodology Exploiting Spatial Correlation in Multi-core Design Spaces 81
Virtual platform-based design space exploration of power-efficient distributed embedded applications 81
A reconfigurable multiprocessor architecture for a reliable face recognition implementation 80
Thermal-Aware Datapath Merging for Coarse-Grained Reconfigurable Processors 80
Totale 10.925
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Categoria #
all - tutte 41.544
article - articoli 9.439
book - libri 227
conference - conferenze 28.906
curatela - curatele 299
other - altro 0
patent - brevetti 198
selected - selezionate 0
volume - volumi 2.475
Totale 83.088
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2018/20191.346 0 0 0 0 0 0 0 0 0 0 721 625
2019/20204.471 302 235 101 359 552 620 582 440 548 215 374 143
2020/20212.352 191 153 205 124 159 110 168 219 159 274 174 416
2021/20221.586 92 223 135 67 189 97 85 117 70 89 158 264
2022/20231.910 217 124 71 252 197 264 7 134 282 208 111 43
2023/2024838 75 163 65 88 80 124 47 95 14 78 9 0
Totale 14.855