FORNACIARI, WILLIAM
FORNACIARI, WILLIAM
DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA
3D-ICE 3.0: efficient nonlinear MPSoC thermal simulation with pluggable heat sink models
2021-01-01 Terraneo, Federico; Leva, Alberto; Fornaciari, William; Zapater Sancho, Marina; Atienza Alonso, David
A Case Study in Design Space Exploration: The TOSCA Environment Applied to a Telecom Link Controller
2000-01-01 Allara, Alberto; Fornaciari, William; B., Massimo; Salice, Fabio
A Comprehensive Side-Channel Information Leakage Analysis of an In-Order RISC CPU Microarchitecture
2018-01-01 Zoni, D.; Barenghi, A.; Pelosi, G.; Fornaciari, W.
A Control-based Methodology for Power-performance Optimization in NoCs Exploiting DVFS
2015-01-01 Zoni, Davide; Terraneo, Federico; Fornaciari, William
A DVFS Cycle Accurate Simulation Framework with Asynchronous NoC Design for Power-Performance Optimizations
2016-01-01 Zoni, Davide; Terraneo, Federico; Fornaciari, William
A new architecture for the automatic design of custom digital neural network
1995-01-01 Fornaciari, William; Salice, Fabio
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems
2002-01-01 Fornaciari, William; Sciuto, Donatella; Silvano, Cristina; Zaccaria, Vittorio
A SPICE-Based Approach to Steady-State Circuits Analysis
1993-01-01 D'Amore, Dario; Fornaciari, William
A survey on run-time power monitors at the edge
2023-01-01 Zoni, Davide; Galimberti, Andrea; Fornaciari, William
A two-level cosimulation environment
1997-01-01 Fornaciari, William; Salice, Fabio; Sciuto, Donatella
A VHDL-based Approach for Power Estimation of Embedded Systems
1997-01-01 Fornaciari, William; P., Gubian; Sciuto, Donatella; Silvano, Cristina
Affinity-driven system design exploration for heterogeneous multiprocessor SoC
2006-01-01 Brandolese, Carlo; Fornaciari, William; L., Pomante; Salice, Fabio; Sciuto, Donatella
All-digital control-theoretic scheme to optimize energy budget and allocation in multi-cores
2020-01-01 Zoni, Davide; Cremona, Luca; Fornaciari, William
All-digital energy-constrained controller for general-purpose accelerators and CPUs
2019-01-01 Zoni, Davide; Cremona, Luca; Fornaciari, William
An FPU design template to optimize the accuracy-efficiency-area trade-off
2021-01-01 Zoni, Davide; Galimberti, Andrea; Fornaciari, William
APES - Implementation of a CAD tool for array processor design: Textual definition versus graphic description
1990-01-01 Distante, F.; Piuri, Vincenzo; Aliquo', A.; Chiari, N.; Fornaciari, William; Rastelli, P.
Automatic identification and hardware implementation of a resource-constrained power model for embedded systems
2021-01-01 Cremona, Luca; Fornaciari, William; Zoni, Davide
BarMan: a Run-Time Management Framework in the Resource Continuum
2022-01-01 Zanella, Michele; Sciamanna, Filippo; Fornaciari, William
BlackOut: Enabling fine-grained power gating of buffers in Network-on-Chip routers
2017-01-01 Zoni, Davide; Canidio, Andrea; Fornaciari, William; Englezakis, Panayiotis; Nicopoulos, Chrysostomos; Sazeides, Yiannakis
chronovise: Measurement-Based Probabilistic Timing Analysis framework
2018-01-01 Reghenzani, F.; Massari, G.; Fornaciari, W.