GALIMBERTI, ANDREA

GALIMBERTI, ANDREA  

DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA  

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Titolo Data di pubblicazione Autori File
Cost-effective fixed-point hardware support for RISC-V embedded systems 1-gen-2022 D. ZoniA. Galimberti
Efficient and scalable FPGA design of GF(2m) inversion for post-quantum cryptosystems 1-gen-2022 A. GalimbertiD. Zoni +
Efficient and scalable FPGA-oriented design of QC-LDPC bit-flipping decoders for post-quantum cryptography 1-gen-2020 Davide ZoniAndrea GalimbertiWilliam Fornaciari
Evaluating the Trade-offs in the Hardware Design of the LEDAcrypt Encryption Functions 1-gen-2019 A. BarenghiW. FornaciariA. GalimbertiG. PelosiD. Zoni
Flexible and scalable FPGA-oriented design of multipliers for large binary polynomials 1-gen-2020 Davide ZoniAndrea GalimbertiWilliam Fornaciari
An FPU design template to optimize the accuracy-efficiency-area trade-off 1-gen-2021 Davide ZoniAndrea GalimbertiWilliam Fornaciari
On the use of hardware accelerators in QC-MDPC code-based cryptography 1-gen-2022 Galimberti, AndreaMontanaro, GabrieleFornaciari, WilliamZoni, Davide +
Probabilistic-WCET reliability: on the experimental validation of EVT hypotheses 1-gen-2019 Federico ReghenzaniGiuseppe MassariWilliam FornaciariAndrea Galimberti
TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale 1-gen-2021 Giovanni AgostaDaniele CattaneoWilliam FornaciariAndrea GalimbertiGiuseppe MassariFederico ReghenzaniFederico TerraneoDavide ZoniCarlo Brandolese +
VGM-Bench: FPU Benchmark suite for Computer Vision, Computer Graphics and Machine Learning applications 1-gen-2020 Luca CremonaWilliam FornaciariAndrea GalimbertiAndrea RomanoniDavide Zoni