ZONI, DAVIDE
ZONI, DAVIDE
DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA
A Comprehensive Side-Channel Information Leakage Analysis of an In-Order RISC CPU Microarchitecture
2018-01-01 Zoni, D.; Barenghi, A.; Pelosi, G.; Fornaciari, W.
A Control-based Methodology for Power-performance Optimization in NoCs Exploiting DVFS
2015-01-01 Zoni, Davide; Terraneo, Federico; Fornaciari, William
A DVFS Cycle Accurate Simulation Framework with Asynchronous NoC Design for Power-Performance Optimizations
2016-01-01 Zoni, Davide; Terraneo, Federico; Fornaciari, William
A Fresh View on the Microarchitectural Design of FPGA-Based RISC CPUs in the IoT Era
2019-01-01 Scotti, Giovanni; Zoni, Davide
A survey on run-time power monitors at the edge
2023-01-01 Zoni, Davide; Galimberti, Andrea; Fornaciari, William
All-digital control-theoretic scheme to optimize energy budget and allocation in multi-cores
2020-01-01 Zoni, Davide; Cremona, Luca; Fornaciari, William
All-digital energy-constrained controller for general-purpose accelerators and CPUs
2019-01-01 Zoni, Davide; Cremona, Luca; Fornaciari, William
An FPU design template to optimize the accuracy-efficiency-area trade-off
2021-01-01 Zoni, Davide; Galimberti, Andrea; Fornaciari, William
Automatic identification and hardware implementation of a resource-constrained power model for embedded systems
2021-01-01 Cremona, Luca; Fornaciari, William; Zoni, Davide
BlackOut: Enabling fine-grained power gating of buffers in Network-on-Chip routers
2017-01-01 Zoni, Davide; Canidio, Andrea; Fornaciari, William; Englezakis, Panayiotis; Nicopoulos, Chrysostomos; Sazeides, Yiannakis
CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties
2017-01-01 Grüttner, Kim; Görgen, Ralph; Schreiner, Sören; Herrera, Fernando; Peñil, Pablo; Medina, Julio; Villar, Eugenio; Palermo, Gianluca; Fornaciari, William; Brandolese, Carlo; Gadioli, Davide; Vitali, Emanuele; Zoni, Davide; Bocchio, Sara; Ceva, Luca; Azzoni, Paolo; Poncino, Massimo; Vinco, Sara; Macii, Enrico; Cusenza, Salvatore; Favaro, John; Valencia, Raúl; Sander, Ingo; Rosvall, Kathrin; Khalilzad, Nima; Quaglia, Davide
Cost-effective fixed-point hardware support for RISC-V embedded systems
2022-01-01 Zoni, D.; Galimberti, A.
CUTBUF: Buffer Management and Router Design for Traffic Mixing in VNET-based NoCs
2015-01-01 Zoni, Davide; Flich, José; Fornaciari, William
DarkCache: Energy-performance Optimization of Tiled Multi-cores by Adaptively Power Gating LLC Banks
2018-01-01 Zoni, Davide; Colombo, Luca; Fornaciari, William
Design of side-channel resistant power monitors
2022-01-01 Zoni, Davide; Cremona, Luca; Fornaciari, William
Efficient and scalable FPGA design of GF(2m) inversion for post-quantum cryptosystems
2022-01-01 Galimberti, A.; Montanaro, G.; Zoni, D.
Efficient and scalable FPGA-oriented design of QC-LDPC bit-flipping decoders for post-quantum cryptography
2020-01-01 Zoni, Davide; Galimberti, Andrea; Fornaciari, William
Exploring Manycore Architectures for Next-Generation HPC Systems through the MANGO Approach
2018-01-01 Flich, José; Agosta, Giovanni; Ampletzer, Philipp; Atienza Alonso, David; Brandolese, Carlo; Cappe, Etienne; Cilardo, Alessandro; Dragić, Leon; Dray, Alexandre; Duspara, Alen; Fornaciari, William; Fusella, Edoardo; Gagliardi, Mirko; Guillaume, Gerald; Hofman, Daniel; Hoornenborg, Ynse; Iranfar, Arman; Kovač, Mario; Libutti, Simone; Maitre, Bruno; Maria Martínez, José; Massari, Giuseppe; Meinds, Koen; Mlinarić, Hrvoje; Papastefanakis, Ermis; Picornell, Tomás; Piljić, Igor; Pupykina, Anna; Reghenzani, Federico; Staub, Isabelle; Tornero, Rafael; Zanella, Michele; Zapater, Marina; Zoni, Davide
Flexible and scalable FPGA-oriented design of multipliers for large binary polynomials
2020-01-01 Zoni, Davide; Galimberti, Andrea; Fornaciari, William
Gated-CNN: Combating NBTI and HCI aging effects in on-chip activation memories of Convolutional Neural Network accelerators
2022-01-01 Landeros Muñoz, Nicolás; Valero, Alejandro; Gran Tejero, Rubén; Zoni, Davide