The growing demand for always-on intelligence in resource-constrained devices makes edge deployment of deep learning both a necessity and a challenge, requiring platforms that combine efficiency, scalability, and flexibility. RISC-V has emerged as the de facto standard architecture for modern computing platforms at the edge tasked with deep-learning workloads, a trend reinforced by the increasing availability of commercial solutions tailored for inference. This survey delivers a structured taxonomy of the hardware architectures for deep learning at the edge, classified according to how they process data in parallel, represent data, and optimize data movement and whether they implement an application-specific design, and of the supporting software tools, ranging from hardware-software co-design approaches to autotuning and compiler frameworks. Finally, it identifies a set of key findings and outlines the most promising directions for research in the field.

Deep Learning on RISC-V Platforms at the Edge: A Perspective on the Hardware and Software Support

Agosta, Giovanni;Galimberti, Andrea;Zoni, Davide
2025-01-01

Abstract

The growing demand for always-on intelligence in resource-constrained devices makes edge deployment of deep learning both a necessity and a challenge, requiring platforms that combine efficiency, scalability, and flexibility. RISC-V has emerged as the de facto standard architecture for modern computing platforms at the edge tasked with deep-learning workloads, a trend reinforced by the increasing availability of commercial solutions tailored for inference. This survey delivers a structured taxonomy of the hardware architectures for deep learning at the edge, classified according to how they process data in parallel, represent data, and optimize data movement and whether they implement an application-specific design, and of the supporting software tools, ranging from hardware-software co-design approaches to autotuning and compiler frameworks. Finally, it identifies a set of key findings and outlines the most promising directions for research in the field.
2025
autotuning
compilers
data representation
deep learning
deep neural networks
edge computing
hardware architectures
hardware-software co-design
memory optimization
RISC-V
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/1302626
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