RE.PUBLIC@POLIMI pubblicazioni di ricerca del Politecnico di Milano

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Exploiting partial dynamic reconfiguration for SoC design of complex application on FPGA platforms 1-gen-2005 FERRANDI, FABRIZIOREDAELLI, MASSIMOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Solving the Coloring Problem to Schedule on Partially Dynamically Reconfigurable Hardware 1-gen-2005 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A Data Oriented Approach to the Design of Reconfigurable Stream Decoders 1-gen-2005 AGOSTA, GIOVANNIBRUSCHI, FRANCESCOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
Caronte: a complete methodology to implement partially dynamically self-reconfiguring embedded systems on modern FPGA 1-gen-2005 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture 1-gen-2005 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
Operating system support for dynamically reconfigurable SoC architectures 1-gen-2005 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
MorfWeb: A New Way of Living the Web Access 1-gen-2006 LE MOLI, GESUALDOSANTAMBROGIO, MARCO DOMENICOTZIVISKOU, CHRISTINA
SyCERS: a SystemC design exploration framework for SoC reconfigurable architecture 1-gen-2006 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A Caronte-oriented approach to a network-based educational infrastructure 1-gen-2006 FERRANDI, FABRIZIORANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
The Caronte Approach for Dynamically Reconfigurable Systems 1-gen-2006 SANTAMBROGIO, MARCO DOMENICO
Synthesis of Object Oriented Models on Reconfigurable Hardware 1-gen-2006 AGOSTA, GIOVANNIBRUSCHI, FRANCESCOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
Adaptive Metrics for System-Level Functional Partitioning 1-gen-2006 AGOSTA, GIOVANNISANTAMBROGIO, MARCO DOMENICO +
Partial dynamic reconfiguration: the Caronte approach. A new degree of freedom in the HW/SW codesign 1-gen-2006 SANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
Hardware DWT accelerator for MultiProcessor System On-Chip on FPGA 1-gen-2006 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLATUMEO, ANTONINO +
Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow 1-gen-2006 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Combining Hardware Reconfiguration and Adaptive Computation for a Novel SoC Design Methodology 1-gen-2006 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Using Speculative Computation and Parallelizing Techniques to Improve Scheduling of Control based Designs 1-gen-2006 FERRANDI, FABRIZIOPALERMO, GIANLUCASANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A graph-coloring approach to the allocation and tasks scheduling for reconfigurable architectures 1-gen-2006 SANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLASPOLETINI, PAOLA +
VHDL to FPGA automatic IP-Core generation: a case study on Xilinx design flow 1-gen-2006 FERRANDI, FABRIZIORANA, VINCENZOSANTAMBROGIO, MARCO DOMENICO +
Dynamic Reconfiguration: Core Relocation via Partial Bitstreams Filtering with Minimal Overhead 1-gen-2006 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
ReCPU: a Parallel and Pipelined Architecture for Regular Expression Matching 1-gen-2007 SANTAMBROGIO, MARCO DOMENICO +
Managing Reconfigurable Resources in Heterogeneous Cores Using Portable Pre-Synthesized Templates 1-gen-2007 SANTAMBROGIO, MARCO DOMENICO +
A genetic algorithm based solution for dynamically reconfigurable modules allocation 1-gen-2007 RANA, VINCENZOSANDIONIGI, CHIARASANTAMBROGIO, MARCO DOMENICO
An adaptive genetic algorithm for dynamically reconfigurable modules allocation 1-gen-2007 RANA, VINCENZOSANDIONIGI, CHIARASANTAMBROGIO, MARCO DOMENICO
Data memory management in partial dynamically reconfigurable systems 1-gen-2007 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICO +
Exploring Partial Reconfiguration for Mitigating SEU faults in SRAM-Based FPGAs 1-gen-2007 BOLCHINI, CRISTIANASALICE, FABIOSANTAMBROGIO, MARCO DOMENICO
RoadRunner and IPGen: a combined solution to speedup the reconfigurable architectures design 1-gen-2007 BOLCHINI, CRISTIANABRANDOLESE, CARLOFRIGERIO, LAURARANA, VINCENZOSALICE, FABIOSANTAMBROGIO, MARCO DOMENICO
Task Partitioning for the Scheduling on Reconfigurable Systems driven by Specification Self-Similarity 1-gen-2007 REDAELLI, MASSIMOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Evolvable Hardware: a Functional Level Evolution Framework based on Impulse C 1-gen-2007 ANTOLA, ANNA MARIASANTAMBROGIO, MARCO DOMENICO +
A novel hardware/software codesign methodology based on dynamic reconfiguration with ImpulseC and CoDeveloper 1-gen-2007 ANTOLA, ANNA MARIASANTAMBROGIO, MARCO DOMENICO +
A Novel SoC Design Methodology Combining Adaptive Software and Reconfigurable Hardware 1-gen-2007 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
SEU Mitigation for SRAM-Based FPGAs through Dynamic Partial Reconfiguration 1-gen-2007 BOLCHINI, CRISTIANASANTAMBROGIO, MARCO DOMENICO +
Adaptive genetic algorithm for dynamically reconfigurable modules allocation 1-gen-2007 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Two Novel Approaches to Online Partial Bitstream Relocation in a Dynamically Reconfigurable System 1-gen-2007 FERRANDI, FABRIZIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Caronte: A methodology for the Implementation of Partially dynamically Self-Reconfiguring Systems on FPGA Platforms 1-gen-2007 FERRANDI, FABRIZIOREDAELLI, MASSIMOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Partial dynamic reconfiguration in a multi-FPGAs clustered architecture based on Linux 1-gen-2007 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs 1-gen-2007 BOLCHINI, CRISTIANAMIELE, ANTONIO ROSARIOSANTAMBROGIO, MARCO DOMENICO
Dynamic Reconfigurability in Embedded System Design 1-gen-2007 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
An adaptable FPGA-based System for Regular Expression Matching 1-gen-2008 SANTAMBROGIO, MARCO DOMENICO +
An ILP Formulation for the Task Graph Scheduling Problem Tailored to Bi-dimensional Reconfigurable Architectures 1-gen-2008 REDAELLI, FRANCESCOSANTAMBROGIO, MARCO DOMENICO +
Research meets Education: DRESD, a virtuous circle 1-gen-2008 CURINO, CARLO ALDOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
A Reconguration-aware Floorplacer for FPGAs 1-gen-2008 MONTONE, ALESSIOREDAELLI, FRANCESCOSANTAMBROGIO, MARCO DOMENICO +
Reconfigurable Computing and Hardware/Software Codesign 1-gen-2008 SANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Core allocation and relocation management for a self dynamically recongurable architecture 1-gen-2008 SANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A Design Flow Tailored for Self Dynamic Reconfigurable Architecture 1-gen-2008 CANCARE', FABIOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
A Requirements-Driven Recongurable SoC Communication Infrastructure Design Flow 1-gen-2008 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
Design methodology for partial dynamic reconguration: a new degree of freedom in the HW/SW codesign 1-gen-2008 SANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA
A Design Workflow for the Identication of Area Constraints in Dynamic Recongurable Systems 1-gen-2008 SANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
HARPE: a Harvard-based Processing Element Tailored for Partial Dynamic Recongurable Architectures 1-gen-2008 RANA, VINCENZOSANTAMBROGIO, MARCO DOMENICOSCIUTO, DONATELLA +
A Requirements-Driven Simulation Framework For Communication Infrastructures Design 1-gen-2008 BRUSCHI, FRANCESCOMERONI, ALESSANDRORANA, VINCENZOSANTAMBROGIO, MARCO DOMENICO
Mostrati risultati da 1 a 50 di 365
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