Self, partial and dynamical reconfiguration, in both its 1D and 2D paradigms, gives the possibility of enhancing the flexibility of a reconfigurable system. It is a powerful approach but, at the same time, causes a significant increase in the complexity of system creation and management. The 1D paradigm allows the dynamical reconfiguration of columns spanning the whole device vertically; the 2D paradigm, on the other hand, allows the reconfiguration of areas of arbitrary rectangular shape. The 2D approach is more powerful, because of the added flexibility, but also requires a more complex management. The goal of this paper is to present a complete workflow to support the designer in creating and managing such systems, specifically in the identification of the online cores placement and in the core relocation support. This paper presents a workflow able to combine online cores placement with runtime bitstreams relocation to implement a complete solution that can be used in conjunction with runtime self reconfiguration. The validation phase presents the results obtained in placement management and relocation, compared to the results obtained by state of art solutions to this problem.

Core allocation and relocation management for a self dynamically recongurable architecture

SANTAMBROGIO, MARCO DOMENICO;SCIUTO, DONATELLA
2008

Abstract

Self, partial and dynamical reconfiguration, in both its 1D and 2D paradigms, gives the possibility of enhancing the flexibility of a reconfigurable system. It is a powerful approach but, at the same time, causes a significant increase in the complexity of system creation and management. The 1D paradigm allows the dynamical reconfiguration of columns spanning the whole device vertically; the 2D paradigm, on the other hand, allows the reconfiguration of areas of arbitrary rectangular shape. The 2D approach is more powerful, because of the added flexibility, but also requires a more complex management. The goal of this paper is to present a complete workflow to support the designer in creating and managing such systems, specifically in the identification of the online cores placement and in the core relocation support. This paper presents a workflow able to combine online cores placement with runtime bitstreams relocation to implement a complete solution that can be used in conjunction with runtime self reconfiguration. The validation phase presents the results obtained in placement management and relocation, compared to the results obtained by state of art solutions to this problem.
Proc. IEEE Computer Society Annual Symposium on VLSI, 2008
9780769532912
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11311/546623
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