CASSANO, LUCA MARIA

CASSANO, LUCA MARIA  

DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA  

Mostra records
Risultati 1 - 20 di 21 (tempo di esecuzione: 0.034 secondi).
Titolo Data di pubblicazione Autori File
Analysis and test of the effects of single event upsets affecting the configuration memory of SRAM-based FPGAs 1-gen-2014 Cassano, Luca +
An Approximation-based Fault Detection Scheme for Image Processing Applications 1-gen-2020 Biasielli M.Cassano L.Miele A.
A configurable board-level adaptive incremental diagnosis technique based on decision trees 1-gen-2015 BOLCHINI, CRISTIANACASSANO, LUCA MARIA
Early assessment of SEU sensitivity through untestable fault identification 1-gen-2014 Cassano, Luca +
Error Modeling for Image Processing Filters accelerated onto SRAM-based FPGAs 1-gen-2020 Bolchini C.Cassano L.Mazzeo A.Miele A.
Exploiting dynamic partial reconfiguration for on-line on-demand testing of permanent faults in reconfigurable systems 1-gen-2014 Cassano, Luca +
Formal approaches to SEU testing in FPGAs 1-gen-2013 Cassano, Luca +
HATE: a HArdware Trojan Emulation Environment for Microprocessor-based Systems 1-gen-2019 Cristiana BolchiniLuca CassanoREPOLE, GIAMPIERO +
An inter-processor communication interface for data-flow centric heterogeneous embedded multiprocessor systems 1-gen-2014 Cassano, Luca +
Lifetime-aware load distribution policies in multi-core systems: An in-depth analysis 1-gen-2016 BOLCHINI, CRISTIANACASSANO, LUCA MARIAMIELE, ANTONIO ROSARIO
Lightweight Fault Detection and Management for Image Restoration 1-gen-2020 Bolchini C.Cassano L.Miele A. +
Lightweight Protection of Cryptographic Hardware Accelerators against Differential Fault Analysis 1-gen-2020 Cassano L. +
A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses 1-gen-2021 Cassano, LucaOttavi, Marco +
Machine learning-based techniques for incremental functional diagnosis: A comparative analysis 1-gen-2014 BOLCHINI, CRISTIANACASSANO, LUCA MARIA
A Microprocessor Protection Architecture against Hardware Trojans in Memories 1-gen-2020 Cassano L.Ottavi M. +
A novel adaptive fault tolerant flip-flop architecture based on TMR 1-gen-2014 Cassano, Luca +
On-line testing of permanent radiation effects in reconfigurable systems 1-gen-2013 Cassano, Luca +
Protecting RSA hardware accelerators against differential fault analysis through residue checking 1-gen-2019 Cassano L. +
A Smart Fault Detection Scheme for Reliable Image Processing Applications 1-gen-2019 Matteo BiasielliCristiana BolchiniLuca CassanoAntonio Miele
Usability-based Cross-Layer Reliability Evaluation of Image Processing Applications 1-gen-2021 Bolchini, CristianaCassano, LucaMazzeo, AndreaMiele, Antonio