CASSANO, LUCA MARIA

CASSANO, LUCA MARIA  

DIPARTIMENTO DI ELETTRONICA, INFORMAZIONE E BIOINGEGNERIA  

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Titolo Data di pubblicazione Autori File
A Fully Automated and Configurable Cost-Aware Framework for Adaptive Functional Diagnosis 1-gen-2017 BOLCHINI, CRISTIANACASSANO, LUCA MARIA
A methodology for the design and deployment of distributed cyber–physical systems for smart environments 1-gen-2020 Cassano L.Miele A. +
A Neural Network Based Fault Management Scheme for Reliable Image Processing 1-gen-2020 Biasielli M.Bolchini C.Cassano L.Miele A. +
A Novel Approach to Incremental Functional Diagnosis for Complex Electronic Boards 1-gen-2016 BOLCHINI, CRISTIANACASSANO, LUCA MARIA
A Runtime Resource Management and Provisioning Middleware for Fog Computing Infrastructures 1-gen-2022 Antonio MieleLuca CassanoCristiana Bolchini +
Adapting the duty cycle to traffic load in a preamble sampling MAC for WSNs: Formal specification and performance evaluation 1-gen-2016 Cassano, Luca +
AENEAS: An energy-aware simulator of automatic weather stations 1-gen-2014 Cassano, Luca +
An Expert CAD Flow for Incremental Functional Diagnosis of Complex Electronic Boards 1-gen-2015 BOLCHINI, CRISTIANACASSANO, LUCA MARIAQUINTARELLI, ELISASALICE, FABIO +
Approximation-Based Fault Tolerance in Image Processing Applications 1-gen-2022 Bolchini C.Cassano L.Mazzeo A.Miele A. +
Design of Fault-Tolerant Distributed Cyber-Physical Systems for Smart Environments 1-gen-2022 Cassano L.Miele A. +
DETON: DEfeating hardware Trojan horses in microprocessors through software ObfuscatioN 1-gen-2022 Cassano, LLopez, TANazzari, A +
Fast and Accurate Error Simulation for CNNs Against Soft Errors 1-gen-2023 Bolchini C.Cassano L.Miele A. +
Fault Impact Estimation for Lightweight Fault Detection in Image Filtering 1-gen-2022 Bolchini C.Boracchi G.Cassano L.Miele A.Stucchi D.
Is your FPGA bitstream Hardware Trojan-free? Machine learning can provide an answer 1-gen-2022 Palumbo, ACassano, L +
OLT(RE)2: An On-Line On-Demand Testing Approach for Permanent Radiation Effects in Reconfigurable Systems 1-gen-2018 Cassano L. +
Optimizing the Use of Behavioral Locking for High-Level Synthesis 1-gen-2023 Pilato C.Collini L.Cassano L.Sciuto D. +
Processor Security: Detecting Microarchitectural Attacks via Count-Min Sketches 1-gen-2022 Palumbo, ACassano, L +
Securing RSA hardware accelerators through residue checking 1-gen-2021 Cassano, Luca +